5962-8984105KA QP SEMICONDUCTOR, 5962-8984105KA Datasheet - Page 16
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5962-8984105KA
Manufacturer Part Number
5962-8984105KA
Description
Manufacturer
QP SEMICONDUCTOR
Datasheet
1.5962-8984105KA.pdf
(21 pages)
Specifications of 5962-8984105KA
Lead Free Status / RoHS Status
Not Compliant
DEFENSE SUPPLY CENTER COLUMBUS
4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of
4.3.1 Group A inspection.
DSCC FORM 2234
APR 97
changes which may affect capacitance. Sample size is 15 devices with no failures, and all input and output terminals
tested.
which may affect I
4.3.2 Group C inspection. Group C inspection shall be in accordance with table III of method 5005 of MIL-STD-883
and as follows:
number and frequency of testing shall be the same as that required for group C inspection. Extended data retention
shall also consist of the following:
AF = Acceleration factor (unitless quantity) = t
T = Temperature in Kelvin (i.e., °C + 273 = K).
t
t
K = Boltzmanns constant = 8.62 x 10-5 eV/°K using an apparent activation
The maximum bake temperature shall not exceed +200°C.
C.
1
2
COLUMBUS, OHIO 43216-5000
= Time (hrs) at temperature T
= Time (hrs) at temperature T
MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply.
a. Tests shall be as specified in table II herein.
b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted.
c. Subgroup 4 (C
d. I
e. Subgroups 7 and 8 shall be sufficient to verify the truth table.
a. End-point electrical parameters shall be as specified in table II herein.
b. Steady-state life test conditions, method 1005 of MIL-STD-883.
c. An extended data retention test shall be added. A new sample shall be selected, and the sample size, accept
MICROCIRCUIT DRAWING
(1)
(2)
(3)
(4)
(1)
(2)
(3) Read the pattern after bake and perform end-point electrical tests in accordance with table II herein for group
OS
energy (EA) of 0.6 eV.
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent
specified in test method 1005 of MIL-STD-883.
such that the cell will not be in a neutral state.
accelerated by using a higher temperature in accordance with the Arrhenius Relationship:
measurements in subgroup 1 shall be measured only for the initial test and after process or design changes
Test condition D. The test circuit shall be maintained by the manufacturer under document revision level
TA = +125°C, minimum.
Test duration: 1,000 hours except as permitted by method 1005 of MIL-STD-883.
All devices shall be programmed with a pattern that assures all inputs and I/O's are dynamically switched.
All devices shall have a minimum of 50 percent of the logic array programmed with a charge on all cells,
Unbiased bake for 1,000 hours (minimum) at +150°C (minimum). The unbiased bake time may be
STANDARD
OS
. Sample size is 15 devices with no failures, and all output terminals tested.
IN
and C
I/O/Q
1
2
.
.
measurements) shall be measured only for the initial test and after process or design
1
/t
2
.
SIZE
A
REVISION LEVEL
J
SHEET
5962-89841
16