W83195BR-341-TR Nuvoton Technology Corporation of America, W83195BR-341-TR Datasheet - Page 18

• Manufacturer Part Number: W83195BR-341-TR
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83195BR-341-TR

• Lead Free Status / RoHS Status: Not Compliant

7.16 Register 16: DRAM Buffer Control (1 = Enable, 0 = Disable) (Default: 7Fh)
7.17 Register 17: Slew Rate Control (Default: CFh)
7.18 Register 18: M/N Time & Type Control (Default: 5Bh)
Note: This Byte only for Winbond internal and BOIS program use, the release version please reserved
this byte.
BIT
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
FBOUT_EN
CPUOD_S2
CPUOD_S1
M_Time<2>
M_Time<1>
M_Time<0>
N_Time<2>
N_Time<1>
N_Time<0>
FBOUT_S2
FBOUT_S1
DDR3_S2
DDR3_S1
DDR0_S2
DDR0_S1
M_TYPE
N_TYPE
Reserve
NAME
NAME
NAME
DDR5
DDR4
DDR3
DDR2
DDR1
DDR0
CLOCK GEN. FOR VIA P4/KT SERIES CHIPSET
PWD
PWD
PWD
0
1
1
1
1
1
1
1
1
1
0
0
1
1
1
1
1
0
1
1
0
1
1
0
Reserve
FBOUT output control
DDRT5, DDRC5 / SDRAM10, 11 output control
DDRT4, DDRC4 / SDRAM8, 9 output control
DDRT3, DDRC3 / SDRAM6, 7 output control
DDRT2, DDRC2 / SDRAM4, 5 output control
DDRT1, DDRC1 / SDRAM2, 3 output control
DDRT0, DDRC0 / SDRAM0, 1 output control
FBOUT slew rate control
11: Strong, 00: Weak, 10/01: Normal
CPUODT/C slew rate control
11: Strong, 00: Weak, 10/01: Normal
DDR3, 4,5/SDRAM6, 7,8,9,10,11 slew rate control
11: Strong, 00: Weak, 10/01: Normal
DDR0, 1,2/SDRAM 0,1,2,3,4,5 slew rate control
11: Strong, 00: Weak, 10/01: Normal
M/N mode N value change time control
M/N mode M value change time control
Reserved for Winbond internal use, don’t modify it
Reserved for Winbond internal use, don’t modify it
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FUNCTION DESCRIPTION
FUNCTION DESCRIPTION
FUNCTION DESCRIPTION