AD9430-LVDS/PCBZ Analog Devices Inc, AD9430-LVDS/PCBZ Datasheet - Page 42

• Manufacturer Part Number: AD9430-LVDS/PCBZ
• Manufacturer: Analog Devices Inc

Specifications of AD9430-LVDS/PCBZ

• Lead Free Status / RoHS Status: Compliant

AD9430
OUTLINE DIMENSIONS
ORDERING GUIDE
Model
AD9430BSV-170
AD9430BSVZ-170
AD9430BSV-210
AD9430BSVZ-210
AD9430-CMOS/PCB
AD9430-LVDS/PCB
1
Z = Pb-free part.
1
1
NOTES
1. CENTER FIGURES ARE TYPICAL UNLESS OTHERWISE NOTED.
2. THE AD9430 HAS A CONDUCTIVE HEAT SLUG TO HELP DISSIPATE HEAT AND ENSURE RELIABLE OPERATION OF
Temperature Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
THE DEVICE OVER THE FULL INDUSTRIAL TEMPERATURE RANGE. THE SLUG IS EXPOSED ON THE BOTTOM OF
THE PACKAGE AND ELECTRICALLY CONNECTED TO CHIP GROUND. IT IS RECOMMENDED THAT NO PCB SIGNAL
TRACES OR VIAS BE LOCATED UNDER THE PACKAGE THAT COULD COME IN CONTACT WITH THE CONDUCTIVE
SLUG. ATTACHING THE SLUG TO A GROUND PLANE WILL REDUCE THE JUNCTION TEMPERATURE OF THE
DEVICE WHICH MAY BE BENEFICIAL IN HIGH TEMPERATURE ENVIRONMENTS.
SEATING
PLANE
0.75
0.60
0.45
0.20
0.09
MAX
1.20
3.5°
7°
0°
Figure 76.100-Lead Thin Quad Flat Package, Exposed Pad [TQFP_EP]
25
1
100
26
0.50 BSC
16.00 BSC SQ
PIN 1
COMPLIANT TO JEDEC STANDARDS MS-026-AED-HD
Package Description
100-Lead Thin Quad Flat Package, Exposed Pad (TQFP_EP)
100-Lead Thin Quad Flat Package, Exposed Pad (TQFP_EP)
100-Lead Thin Quad Flat Package, Exposed Pad (TQFP_EP)
100-Lead Thin Quad Flat Package, Exposed Pad (TQFP_EP)
Evaluation Board (CMOS Mode) Shipped with –210 Grade
Evaluation Board (LVDS Mode) Shipped with –210 Grade
(PINS DOWN)
TOP VIEW
Dimensions shown in millimeters
14.00 BSC SQ
Rev. D | Page 42 of 44
0.27
0.22
0.17
(SV-100-1)
0.15
0.05
50
76
75
51
1.05
1.00
0.95
COPLANARITY
0.08
75
51
76
50
BOTTOM VIEW
CONDUCTIVE
HEAT SINK
(PINS UP)
NOM
6.50
100
26
1
25
Package Option
SV-100-1
SV-100-1
SV-100-1
SV-100-1