LE58QL02FJC Zarlink, LE58QL02FJC Datasheet - Page 47

• Manufacturer Part Number: LE58QL02FJC
• Description: SLIC 4-CH 3.3V 44-Pin PLCC Tube
• Manufacturer: Zarlink

Specifications of LE58QL02FJC

• Package: 44PLCC
• Number Of Channels Per Chip: 4
• Minimum Operating Supply Voltage: 3.135 V
• Typical Operating Supply Voltage: 3.3 V

6C/6Dh Write/Read Interrupt Mask Register
Mask CD Interrupt
This command does not depend on the state of the Channel Enable Register.
* Power Up and Hardware Reset (RST) Value = FFh.
70/71h Write/Read Operating Conditions
Cutoff Transmit Path
Cutoff Receive Path
High Pass Filter
Lower Receive Gain
Arm Transmit Interrupt
Interface Loopback
Full Digital Loopback
1 kHz Receive Tone
* Power Up and Hardware Reset (RST) Value = 00h.
The B Filter is disabled during receive cutoff.
Command
I/O Data
Command
I/O Data
R/W = 0: Write
R/W = 1: Read
R/W = 0: Write
R/W = 1: Read
MCDx
MCDx
x
C
Masked: A change does not cause the Interrupt Pin to go Low.
CTP = 0*
CTP = 1
CRP = 0*
CRP = 1
HPF = 0*
HPF = 1
LRG = 0*
LRG = 1
ATI = 0*
ATI = 1
ILB = 0*
ILB = 1
FDL = 0*
FDL = 1
TON = 0*
TON = 1
C
C
= 0
= 1*
MCDB4
D
0
7
CTP
CDx
CDx
Bit number (A or B)
Channel number (1 through 4)
Transmit path connected
Transmit path cut off
Receive path connected
Receive path cutoff (see note)
Transmit Highpass filter enabled
Transmit Highpass filter disabled
6 dB loss not inserted
6 dB loss inserted
Transmit Interrupt not Armed
Transmit Interrupt Armed
TSA loopback disabled
TSA loopback enabled
Full digital loopback disabled
Full digital loopback enabled
1 kHz receive tone off
1 kHz receive tone on
D
0
7
MCDA4
C
C
D
1
6
bit is NOT MASKED
bit is MASKED
CRP
D
1
6
Zarlink Semiconductor Inc.
MCDB3
D
1
5
HPF
D
1
5
47
MCDA3
D
0
4
LRG
D
1
4
MCDB2
D
1
3
ATI
D
0
3
MCDA2
D
1
2
ILB
D
0
2
MCDB1
D
0
FDL
1
D
0
1
MCDA1
R/W
TON
D
R/W
D
0
0