LFXP2-5E-5MN132I Lattice, LFXP2-5E-5MN132I Datasheet - Page 3
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LFXP2-5E-5MN132I
Manufacturer Part Number
LFXP2-5E-5MN132I
Description
IC DSP 5KLUTS 86I/O 132CSBGA
Manufacturer
Lattice
Datasheet
1.LFXP2-40E-5FN484I.pdf
(92 pages)
Specifications of LFXP2-5E-5MN132I
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
169984
Number Of I /o
86
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
*
Operating Temperature
-40°C ~ 100°C
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
220-1108
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP2-5E-5MN132I
Manufacturer:
Lattice
Quantity:
134
Company:
Part Number:
LFXP2-5E-5MN132I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Introduction
Lattice Semiconductor
LatticeXP2 Family Data Sheet
Introduction
LatticeXP2 devices combine a Look-up Table (LUT) based FPGA fabric with non-volatile Flash cells in an architec-
ture referred to as flexiFLASH.
The flexiFLASH approach provides benefits including instant-on, infinite reconfigurability, on chip storage with
FlashBAK embedded block memory and Serial TAG memory and design security. The parts also support Live
Update technology with TransFR, 128-bit AES Encryption and Dual-boot technologies.
The LatticeXP2 FPGA fabric was optimized for the new technology from the outset with high performance and low
cost in mind. LatticeXP2 devices include LUT-based logic, distributed and embedded memory, Phase Locked
Loops (PLLs), pre-engineered source synchronous I/O support and enhanced sysDSP blocks.
®
The ispLEVER
design tool from Lattice allows large and complex designs to be efficiently implemented using the
LatticeXP2 family of FPGA devices. Synthesis library support for LatticeXP2 is available for popular logic synthesis
tools. The ispLEVER tool uses the synthesis tool output along with the constraints from its floor planning tools to
place and route the design in the LatticeXP2 device. The ispLEVER tool extracts the timing from the routing and
back-annotates it into the design for timing verification.
Lattice provides many pre-designed Intellectual Property (IP) ispLeverCORE™ modules for the LatticeXP2 family.
By using these IPs as standardized blocks, designers are free to concentrate on the unique aspects of their design,
increasing their productivity.
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