CY29948AC Cypress Semiconductor Corp, CY29948AC Datasheet

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CY29948AC

Manufacturer Part Number
CY29948AC
Description
IC CLK BUFF 1:12 200MHZ 32TQFP
Manufacturer
Cypress Semiconductor Corp
Type
Fanout Buffer (Distribution), Multiplexerr
Datasheet

Specifications of CY29948AC

Number Of Circuits
1
Ratio - Input:output
1:12
Differential - Input:output
Yes/No
Input
LVCMOS, LVPECL, LVTTL
Output
LVCMOS, LVTTL
Frequency - Max
200MHz
Voltage - Supply
2.375 V ~ 3.63 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-TQFP
Frequency-max
200MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Quantity
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Part Number:
CY29948AC
Quantity:
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Part Number:
CY29948AC
Manufacturer:
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Quantity:
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CY29948AC
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Cypress Semiconductor Corporation
Document Number: 38-07288 Rev. *D
Features
2.5V or 3.3V operation
200-MHz clock support
LVPECL or LVCMOS/LVTTL clock input
LVCMOS-/LVTTL-compatible inputs
12 clock outputs: drive up to 24 clock lines
Synchronous Output Enable
Output three-state control
150 ps typical output-to-output skew
Pin compatible with MPC948, MPC948L, MPC9448
Available in Commercial and Industrial temp. range
32-pin TQFP package
Block Diagram
PECL_CLK#
PECL_CLK
TCLK_SEL
SYNC_OE
TCLK
TS#
0
1
VDD
198 Champion Court
VDDC
12
Q0-Q11
Description
The CY29948 is a low-voltage 200-MHz clock distribution
buffer with the capability to select either a differential LVPECL
or a LVCMOS/LVTTL compatible input clock. The two clock
sources can be used to provide for a test clock as well as the
primary
LVCMOS/LVTTL compatible. The 12 outputs are LVCMOS or
LVTTL compatible and can drive 50Ω series or parallel termi-
nated transmission lines. For series terminated transmission
lines, each output can drive one or two traces giving the device
an effective fanout of 1:24. The outputs can also be
three-stated
output-to-output skews make the CY29948 an ideal clock
distribution buffer for nested clock trees in the most
demanding of synchronous systems.
The CY29948 also provides a synchronous output enable
input for enabling or disabling the output clocks. Since this
input is internally synchronized to the input clock, potential
output glitching or runt pulse generation is eliminated.
2.5 V or 3.3 V, 200 MHz, 1:12
PECL_CLK#
Pin Configuration
PECL_CLK
TCLK_SEL
SYNC_OE
TCLK
VDD
system
VSS
TS#
San Jose
Clock Distribution Buffer
via
1
2
3
4
5
6
7
8
clock.
CY29948
the
,
CA 95134-1709
three-state
All
other
24
23
22
21
20
19
18
17
control
Revised May 28, 2010
input
VSS
Q4
VDDC
Q5
VSS
Q6
VDDC
Q7
CY29948
TS#.
inputs
408-943-2600
Low
are
[+] Feedback

Related parts for CY29948AC

CY29948AC Summary of contents

Page 1

... PECL_CLK# 1 TCLK TCLK_SEL SYNC_OE TS# Cypress Semiconductor Corporation Document Number: 38-07288 Rev 3.3 V, 200 MHz, 1:12 Clock Distribution Buffer Description The CY29948 is a low-voltage 200-MHz clock distribution buffer with the capability to select either a differential LVPECL or a LVCMOS/LVTTL compatible input clock. The two clock ...

Page 2

Pin Description [1] Pin Name PWR 3 PECL_CLK 4 PECL_CLK# 2 TCLK 9, 11, 13, 15, Q(11:0) VDDC 17, 19, 21, 23, 25, 27, 29 TCLK_SEL 5 SYNC_OE 6 TS# 10, 14, 18, 22, VDDC 26 ...

Page 3

Maximum Ratings [2] Maximum Input Voltage Relative to V :............. V SS Maximum Input Voltage Relative to V :............. V DD Storage Temperature: ................................ –65° 150°C Operating Temperature:................................ –40°C to +85°C Maximum ESD protection:.............................................. 2 kV Maximum Power ...

Page 4

AC Parameters [ 3.3V ±10% or 2.5V ±5%, over the specified operating range. DD DDC Parameter Description [7] Fmax Input Frequency [7] Tpd PECL_CLK to Q Delay [7] TCLK to Q Delay [7] PECL_CLK to Q ...

Page 5

Figure 4. Propagation Delay (TPD) Test Reference LVCMOS_CLK Figure 5. LVCMOS Propagation Delay (TPD) Test Reference Figure 7. Output-to-Output Skew tsk(0) Document Number: 38-07288 ...

Page 6

... Ordering Information Part Number CY29948AC 32 Pin TQFP CY29948ACT 32 Pin TQFP - Tape and Reel Pb-free CY29948AXC 32 Pin TQFP CY29948AXCT 32 Pin TQFP - Tape and Reel CY29948AXI 32 Pin TQFP CY29948AXIT 32 Pin TQFP - Tape and Reel Package Drawing and Dimensions Document Number: 38-07288 Rev. *D Package Type Commercial, 0° ...

Page 7

... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...

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