CY23FS08OXI Cypress Semiconductor Corp, CY23FS08OXI Datasheet - Page 2

• Manufacturer Part Number: CY23FS08OXI
• Description: IC CLK ZDB 8OUT 200MHZ 28SSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: Fanout Distribution, Multiplexer , Zero Delay Bufferr
• Series: Failsafe™r

Specifications of CY23FS08OXI

• Number Of Circuits: 1
• Package / Case: 28-SSOP
• Pll: Yes with Bypass
• Input: LVCMOS, LVTTL, Crystal
• Output: LVCMOS
• Ratio - Input:output: 3:8
• Differential - Input:output: No/No
• Frequency - Max: 166.7MHz
• Divider/multiplier: No/No
• Voltage - Supply: 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Frequency-max: 200MHz
• Maximum Input Frequency: 166.7 MHz
• Minimum Input Frequency: 1.04 MHz
• Output Frequency Range: 1.7 MHz to 166.7 MHz
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document #: 38-07518 Rev. *C
Pin Definitions
Table 1. Configuration Table
1,2
4,5,10,11
25,24,19,18
27
23,6,7,22
14
15
16
13
8,12
3,9
17,21
20,26
28
Notes:
1. For normal operation, connect either one of the eight clock outputs to the FBK input.
2. Weak pull-downs on all outputs.
3. Weak pull-ups on these inputs.
4. Weak pull-downs on these inputs.
S[4:1]
0000
1000
0101
1001
0001
0100
1010
0010
1110
1011
0011
1100
0110
1101
0111
Pin Number
1111
Min.
8.33
9.50
8.50
8.33
8.33
8.33
8.00
8.00
8.33
8.33
8.33
8.33
8.33
8.33
8.33
XTAL (MHz)
REF1,REF2
CLKB[1:4]
CLKA[1:4]
FBK
S[1:4]
XIN
XOUT
FAIL#/SAFE
VDDC
VDDB
VSSB
VDDA
VSSA
REFSEL
Pin Name
Max.
30
30
30
30
30
30
25
25
30
30
30
30
30
30
30
5V-tolerant, reference clock inputs
Bank B clock outputs.
Bank A clock outputs.
Feedback input to the PLL.
Frequency select pins/PLL and DCXO bypass.
Reference crystal input.
Reference crystal output.
Valid reference indicator. A high level indicates a valid reference input.
3.3V power supply for the internal circuitry.
2.5V or 3.3V power supply for Bank B outputs.
Ground.
2.5V or 3.3V power supply for Bank A outputs.
Ground.
Reference select. Selects the active reference clock from either REF1 or REF2.
REFSEL = 1, REF1 is selected, REFSEL = 0, REF2 is selected.
16.67
57.00
25.00
32.00
64.00
16.67
12.50
Min.
6.80
2.78
8.33
1.04
4.17
4.17
1.39
6.25
REF(MHz)
180.00
100.00
200.00
60.00
24.00
90.00
10.00
30.00
15.00
60.00
15.00
45.00
22.50
Max.
3.75
5.00
[1, 2]
[1, 2]
28.50
32.00
64.00
33.33
16.67
50.00
50.00
11.11
Min.
8.33
1.70
6.25
2.78
8.33
2.08
8.33
OUT(MHz)
PLL and DCXO Bypass mode
[1, ]
100.00
200.00
120.00
180.00
180.00
30.00
90.00
22.50
10.00
30.00
30.00
60.00
40.00
Max.
6.00
7.50
[4]
Description
.
REF:OUT
ratio
[3]
÷2
÷2
÷4
÷4
x1
x1
x1
x1
x2
x2
x2
x4
x4
x8
x8
REF:XTAL
ratio
4/5
1/3
1/8
1/2
1/2
3/2
1/6
3/4
2
6
3
1
4
8
2
CY23FS08
Out:XTAL ratio
Page 2 of 12
1/5
3/4
1/3
1/4
4/3
1
3
1
4
8
1
4
2
6
6
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