CY2308SXC-2 Cypress Semiconductor Corp, CY2308SXC-2 Datasheet - Page 10

• Manufacturer Part Number: CY2308SXC-2
• Description: IC CLK ZDB 8OUT 133MHZ 16SOIC
• Manufacturer: Cypress Semiconductor Corp
• Type: Fanout Distribution, Zero Delay Bufferr

Specifications of CY2308SXC-2

• Number Of Circuits: 1
• Package / Case: 16-SOIC (3.9mm Width)
• Pll: Yes
• Input: LVCMOS, LVTTL
• Output: LVCMOS
• Ratio - Input:output: 1:8
• Differential - Input:output: No/No
• Frequency - Max: 133.3MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Frequency-max: 133MHz
• Output Frequency Range: 10 MHz to 133.3 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Number Of Elements: 1
• Supply Current: 45mA
• Pll Input Freq (min): 10MHz
• Pll Input Freq (max): 133.3MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: SOIC
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Pin Count: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-1769-5; CY2308SXC-2

Document Number: 38-07146 Rev. *L
Typical Duty Cycle
Notes
18. Duty cycle is taken from typical chip measured at 1.4 V.
19. I
(n = number of outputs; C = Capacitance load per output (F); V = Voltage supply (V); f = frequency (Hz).
60
58
56
54
52
50
48
46
44
42
40
DD
60
58
56
54
52
50
48
46
44
42
40
3
20
data is calculated from I
140
120
100
80
60
40
20
0
(for 30 pF Loads over Frequency - 3.3V, 25C)
0
3.1
(for 30 pF Loads over Frequency - 3.3V, 25C)
40
(for 30 pF Loads over Temperature - 3.3V)
IDD vs Number of Loaded Outputs
N umb er o f Lo ad ed Out p ut s
3.2
2
60
Duty Cycle Vs Frequency
Duty Cycle Vs VDD
Frequency (MHz)
VDD (V)
DD
3.3
[18]
= I
80
4
CORE
and I
3.4
+ nCVf, where I
100
DD
6
3.5
Trends
120
8
3.6
CORE
140
is the unloaded current.
[19]
33 MHz
66 MHz
100 MHz
for CY2308–1,2,3,4
33 M Hz
66 M Hz
100 M Hz
-40C
0C
25C
70C
85C
60
58
56
54
52
50
48
46
44
42
40
60
58
56
54
52
50
48
46
44
42
40
3
140
120
100
20
80
60
40
20
0
0
(for 15 pF Loads over Frequency - 3.3V, 25C)
3.1
40
(for 15 pF Loads over Frequency - 3.3V, 25C)
IDD vs Number of Loaded Outputs
(for 15 pF Loads over Temperature - 3.3V)
N umb er o f Lo ad ed O ut p ut s
2
3.2
60
Duty Cycle Vs Frequency
Frequency (MHz)
Duty Cycle Vs VDD
VDD (V)
3.3
4
80
3.4
100
6
3.5
120
8
3.6
140
Page 10 of 17
CY2308
33 M Hz
66 M Hz
100 MH z
133 MH z
33 M Hz
66 M Hz
100 M Hz
-40C
0C
25C
70C
85C
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