IDTQS5917T-70TQG IDT, Integrated Device Technology Inc, IDTQS5917T-70TQG Datasheet - Page 5

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IDTQS5917T-70TQG

Manufacturer Part Number
IDTQS5917T-70TQG
Description
IC CLOCK GEN LVTTL 70MHZ 28QSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Driver, PLLr
Datasheet

Specifications of IDTQS5917T-70TQG

Pll
Yes with Bypass
Input
Clock
Output
LVCMOS, TLL, 3-State
Number Of Circuits
1
Ratio - Input:output
2:8
Differential - Input:output
No/No
Frequency - Max
70MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-QSOP
Frequency-max
70MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
QS5917T-70TQG
INPUT TIMING REQUIREMENTS
SWITCHING CHARACTERISTICS
NOTES:
1. Skew specifications apply under identical environments (loading, temperature, V
2. Measured in open loop mode PLL_EN = 0.
3. Jitter is characterized using an oscilloscope. Measurement is taken one cycle after jitter. Jitter is characterized but not tested. See FREQUENCY SELECTION TABLE for information
NOTE:
1. The F
QS5917T
LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER
Symbol
on proper FREQ_SEL level for specified input frequencies.
t
t
R
PWC
D
Symbol
F
, t
t
H
t
I
SKALL
t
t
t
LOCK
t
t
t
t
F
t
t
SKR
SKF
t
t
PZH
PHZ
R,
PZL
PLZ
PW
PW
PD
PD
I
t
J
specification is based on Q output feedback. See the Frequency Selection Table for more detail on allowable SYNC input frequencies for different feedback combinations.
t
F
Maximum input rise and fall times, 0.8V to 2V
Input Clock Frequency, SYNC
Input clock pulse, HIGH or LOW
Duty cycle, SYNC
Parameter
Output Skew Between Rising Edges, Q
Output Skew Between Falling Edges, Q
Output Skew, All Outputs
Pulse Width, Q
Pulse Width, Q
Cycle-to-Cycle Jitter, 33MHz
SYNC Input to Feedback Delay, 28MHz
SYNC Input to Feedback Delay, 33MHz, 50Ω to 1.5V
SYNC to Phase Lock
Output Enable Time, RST LOW to HIGH
Output Disable Time, RST HIGH to LOW
Output Rise/Fall Times, 0.8V to 2V
5,
0
0
-Q
, SYNC
2xQ outputs
4
, Q/2 outputs
1
(1)
0
Description
, SYNC
(3)
(1)
1 (1)
0
0
-Q
-Q
(2)
(2)
4
4
(1)
and Q/2
(1)
(1)
DD
, device speed grade).
5
T
T
CY
CY
− 100
− 100
Min.
/2 − 0.65
/2 − 0.5
0.4
0
0
INDUSTRIAL TEMPERATURE RANGE
Min.
T
T
14
25
2
CY
CY
Max.
/2 + 0.65
0.25
350
350
500
/2 + 0.5
400
400
1.5
10
7
6
Max.
F
75
2XQ
3
MHz
Unit
Unit
ms
ps
ps
ps
ns
ns
ns
ps
ps
ns
ns
ns
%
ns
ns

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