ICS672M-02I IDT, Integrated Device Technology Inc, ICS672M-02I Datasheet - Page 2

• Manufacturer Part Number: ICS672M-02I
• Description: IC DELAY BUFFER QUADRACLK 16SOIC
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Fanout Distribution, Zero Delay Bufferr

Specifications of ICS672M-02I

• Pll: Yes
• Input: Clock
• Output: CMOS
• Number Of Circuits: 1
• Ratio - Input:output: 1:4
• Differential - Input:output: No/No
• Frequency - Max: 135MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3.13 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC
• Frequency-max: 135MHz
• Number Of Elements: 1
• Pll Input Freq (min): 5MHz
• Pll Input Freq (max): 150MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: SOIC N
• Output Frequency Range: 15 to 135MHz
• Operating Supply Voltage (min): 3.13V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Industrial
• Pin Count: 16
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 672M-02I

Pin Assignment
Pin Descriptions
IDT™ / ICS™ QUADRACLOCK QUADRATURE DELAY BUFFER
Number
ICS672-01/02
QUADRACLOCK QUADRATURE DELAY BUFFER
6, 7, 12
11, 13
Pin
10
14
15
16
1
2
3
4
5
8
9
CLK180
CLK270
VDDIO
CLK90
ICLK
GND
GND
S0
CLK180
CLK270
VDDIO
FBCLK
CLK90
Name
CLK0
ICLK
GND
FBIN
VDD
Pin
S0
S1
S2
1
2
3
4
5
6
7
8
Output Clock output (90° delayed from CLK0).
Output Clock output (180° delayed from CLK0).
Output
Output Clock output phase aligned to ICLK.
Output Feedback clock output (0° phase shift from CLK0).
Power
Power
Power
Type
Input
Input
Input
Input
Input
Pin
Clock input.
Supply voltage for input and output clocks. Must not exceed VDD.
Connect to ground.
Select input 0. See table above.
Select input 1. See table above.
Select input 2. See table above.
Connect to 3.3 V or 5.0 V.
Feedback clock input. in normal operation, connect to FBCLK.
Clock output (270° delayed from CLK0).
16
15
14
13
12
11
10
9
VDD
S2
S1
FBIN
FBCLK
CLK0
VDD
GND
2
Output Clock Mode Select Table
S2
0
0
0
0
1
1
1
1
Pin Description
S1
0
0
1
1
0
0
1
1
S0
0
1
0
1
0
1
0
1
Power-down + tri-state
Output Clocks
x0.5
x1
x2
x3
x4
x5
x6
ICS672-01/02
ZERO DELAY BUFFER
REV L 051310