STCL1100YBFCWY5 STMicroelectronics, STCL1100YBFCWY5 Datasheet - Page 8

• Manufacturer Part Number: STCL1100YBFCWY5
• Description: IC OSC HI FREQ 10MHZ SOT23-5
• Manufacturer: STMicroelectronics
• Type: Oscillator, Siliconr
• Series: STCLr

Specifications of STCL1100YBFCWY5

• Frequency: 10MHz
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 590µA
• Operating Temperature: -20°C ~ 85°C
• Package / Case: SOT-23-5, SC-74A, SOT-25
• Count: *
• Product: XO
• Supply Voltage: 4.5 Volts to 5.5 Volts
• Load Capacitance: 12 pF
• Termination Style: SMD/SMT
• Minimum Operating Temperature: - 20 C
• Maximum Operating Temperature: + 85 C
• Dimensions: 2.6 mm W x 2.8 mm L
• Height: 0.9 mm
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-6834-2

Operation
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4.1
4.2
4.3
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Operation
Use of the STCL1xx0 silicon oscillator device is very simple. Once power is applied to V
pin, a CMOS-compatible square wave output signal is provided on the F
active mode the Chip Enable (CE) input pin must be at a logic high level).
Chip Enable (CE)
This feature allows the user to stop the clock and significantly reduce the current
consumption when the application is put into power saving mode.
When used to clock the microprocessor in place of a crystal, the need for chip enable input
stems from a difference in the way microprocessors normally disable their clock. In the case
of a crystal or ceramic resonator, when going into power saving mode, the processor simply
opens the internal Xtal inverter feedback which results in stopping the crystal oscillations;
however in the case of the silicon oscillators this would not work and the oscillator would
continue to run. So in order to use this feature, one of the microprocessor's output pins must
be configured to control the silicon oscillator's Chip Enable (CE) input, see Typical
application circuit diagram. To minimize standby current of the oscillator device, no internal
pull-up resistor is implemented on the CE input, thus the input level must be permanently
defined by the controlling signal.
Transition to disable
The device provides additional 32 complete clock cycles after the chip enable input went
inactive to allow the clocked microprocessor to complete pipelined instructions before going
into sleep mode. Then during disable the output remains low.
Fast startup and wakeup from disable
The total startup time until oscillations internally stabilize and remain within specifications is
50 µs max from the point when V
point when CE went active (wakeup from disable mode). The output remains low even
during initial 16 cycles after CE went active to provide stabilized valid output waveform
already from the first output cycle, see
Startup output waveform, first cycles zoom (power-on),
milliseconds typical for crystal oscillators or hundreds of microseconds for ceramic
resonators.
Doc ID 13337 Rev 5
CC
reached min operating voltage (at power on) or from the
Table 3: DC and AC parameters
STCL1120. Compare to
STCL1100 STCL1120 STCL1160
and
OUT
Figure 8:
output pin (in
CC