Z84C3006PEG Zilog, Z84C3006PEG Datasheet - Page 139
![IC 6MHZ Z80 CMOS CTC 28-PDIP](/photos/6/57/65755/269-28-dip_sml.jpg)
Z84C3006PEG
Manufacturer Part Number
Z84C3006PEG
Description
IC 6MHZ Z80 CMOS CTC 28-PDIP
Manufacturer
Zilog
Type
Counter/Timer Circuit (CTC)r
Series
Z80r
Specifications of Z84C3006PEG
Frequency
6MHz
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
8mA
Operating Temperature
-40°C ~ 100°C
Package / Case
28-DIP (0.600", 15.24mm)
Processor Series
Z84C3xx
Core
Z80
Data Bus Width
8 bit
Maximum Clock Frequency
6 MHz
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 100 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Filter Terminals
SMD
Ic Generic Number
84C30
Operating Temperature Min
-40°C
Operating Temperature Max
100°C
Clock Frequency
6MHz
Rohs Compliant
Yes
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
28
Supply Voltage Range
5V
Operating Temperature Range
-40°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Count
-
Lead Free Status / Rohs Status
Details
Other names
269-3910
Z84C3006PEG
Z84C3006PEG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z84C3006PEG
Manufacturer:
ZILOG
Quantity:
1 980
Company:
Part Number:
Z84C3006PEG
Manufacturer:
Zilog
Quantity:
1 722
Company:
Part Number:
Z84C3006PEG
Manufacturer:
ZILOG
Quantity:
1 980
Company:
Part Number:
Z84C3006PEG
Manufacturer:
WSI
Quantity:
4 970
Part Number:
Z84C3006PEG
Manufacturer:
ZILOG
Quantity:
20 000
- Current page: 139 of 308
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Operation:
Op Code:
Operands:
Description: The top two bytes of the external memory LIFO (last-in, first-out) Stack
Condition Bits Affected: None
Example:
UM008005-0205
qqH ← (SP+1), qqL ← (SP)
POP
qq
are popped to register pair qq. The Stack Pointer (SP) register pair holds
the 16-bit address of the current top of the Stack. This instruction first
loads to the low order portion of qq, the byte at memory location
corresponding to the contents of SP; then SP is incriminated and the
contents of the corresponding adjacent memory location are loaded to the
high order portion of qq and the SP is now incriminated again. The
operand qq identifies register pair BC, DE, HL, or AF, assembled as
follows in the object code:
If the Stack Pointer contains
and location
pair HL containing
1
1
M Cycles
Pair
q
BC
DE
HL
AF
1001H
3
q
3355H
contains
0
POP qq
, and the Stack Pointer containing
0
10 (4, 3, 3)
1000H
T States
33H
0
00
01
10
11
r
, the instruction
, memory location
1
4 MHz E.T.
POP HL
2.50
1000H
Z80 Instruction Set
User’s Manual
results in register
1002H
contains
Z80 CPU
.
55H
,
119
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