AD8389ACPZ Analog Devices Inc, AD8389ACPZ Datasheet - Page 8

IC TRPL DELAY LOCK LOOP 48-LFCSP

AD8389ACPZ

Manufacturer Part Number
AD8389ACPZ
Description
IC TRPL DELAY LOCK LOOP 48-LFCSP
Manufacturer
Analog Devices Inc
Type
Delayed, Locked Loopr
Datasheet

Specifications of AD8389ACPZ

Frequency
85MHz
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
11mA
Operating Temperature
0°C ~ 85°C
Package / Case
48-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Count
-
AD8389
The phase detector compares the delayed DX and MONITxI
reference inputs and automatically adjusts the variable delay (t
maintaining the constant delay (t
DX and MONITxI. Five matched delay lines maintain the phase
relationship between DXxO, CLXxO, and ENBX(1–4)xO.
When the loop is locked, t
delay through the level shifter and the LCD.
The external delay of a typical system is the sum of the level
shifter delay (20 ns typical) and the LCD delay, (typically in the
range of 20 ns to 120 ns). At a 75 MHz operating clock
frequency, the maximum expected total delay of 140 ns is equal
to 10.5 clock cycles, requiring COMPEDGE = 1, SLOW = 0 for
systems using negative active edge for DX.
7
= t
5
+ t
7
) between the active edges of
EXT
, where t
EXT
is the total
Rev. 0 | Page 8 of 12
5
),
Figure 7. Typical Input Waveforms at the AD8389 and at the LCD.
CLK
DX
MONITRI
CLX
ENBX1
ENBX2
ENBX3
ENBX4
DXO
MONITI
CLXO
ENBX1O
ENBX2O
ENBX3O
ENBX4O
CONSTANT
COMPEDGE = HIGH.

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