CY25702FLXCT Cypress Semiconductor Corp, CY25702FLXCT Datasheet - Page 3

• Manufacturer Part Number: CY25702FLXCT
• Description: IC XTAL OSC PROG HF 4-CLCC
• Manufacturer: Cypress Semiconductor Corp
• Type: Oscillator, Crystalr

Specifications of CY25702FLXCT

• Frequency: 166MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 4-CLCC
• Operating Supply Voltage (typ): 3.3
• Symmetry Max: 55%
• Operating Temp Range: -20C to 70C
• Screening Level: Commercial
• Frequency Stability: ±25
• Load Capacitance: 15pF
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY3675-LCC4A - BOARD ADAPTER LCC4A428-1918 - KIT DEV FTG PROGRAMMING KIT
• Count: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

Document #: 38-07721 Rev. *C
DC Electrical Characteristics
AC Electrical Characteristics
Note
I
I
V
V
I
I
I
C
I
Δf/f
DC
t
t
T
T
T
T
Parameter
OH
OL
IH
IL
OZ
VDD
R
F
1. Guaranteed by characterization, not 100% tested.
2. Jitter is configuration dependent. Actual jitter is dependent on output frequencies, spread percentage, temperature, and output load. For more information, refer
Parameter
CCJ1
OE1
OE2
LOCK
IH
IL
IN
[1]
to the application note, “Jitter in PLL Based Systems: Causes, Effects, and Solutions” available at http://www.cypress.com/clock/appnotes.html, or contact your
local Cypress Field Application Engineer.
[2]
Output Duty Cycle
Output Rise Time
Output Fall Time
Cycle-to-Cycle Jitter CLK (Pin 3)
Output Disable Time (pin1 = OE)
Output Enable Time (pin1 = OE)
PLL Lock Time
Output High Current (pin 3)
Output Low Current (pin 3)
Input High Voltage (pin 1)
Input Low Voltage (pin 1)
Input High Current (pin 1)
Input Low Current (pin 1)
Output Leakage Current (pin 3)
Input Capacitance (pin 1)
Supply Current
Initial Accuracy at Room Temp.
Freq. Stability over Temp. Range T
Freq. Stability over Voltage Range 3.0 to 3.6V
Aging
Description
Description
[1]
V
V
CMOS levels, 70% of V
CMOS levels, 30% of V
V
V
Three-state output, OE = 0
Pin 1, or OE
V
C
T
T
CLK, Measured at V
20%–80% of V
20%–80% of V
CLK > 133 MHz, Measured at V
25 MHz < CLK < 133 MHz, Measured at V
CLK < 25 MHz, Measured at V
Time from falling edge on OE to stopped
outputs (Asynchronous)
Time from rising edge on OE to outputs at a
valid frequency (Asynchronous)
Time for CLK to reach valid frequency
A
A
A
in
in
OH
OL
DD
LOAD
= 25°C, 3.3V
= –20°C to 70°C, 3.3V
= 25°C, First year
= V
= V
= 0.5, V
= 3.3V, CLK = 1 to 166 MHz,
= V
DD
SS
= 0, OE = V
DD
– 0.5, V
DD
DD,
DD,
= 3.3V (sink)
Condition
Condition
C
C
DD
DD
L
L
DD
=15 pF
=15 pF
= 3.3V (source)
/2
DD
DD
DD
DD
/2
/2
DD
/2
0.7V
Min.
Min.
45
–10
–25
–25
–12
–
–
–
–
–
–
–
–
10
10
–5
–
–
–
–
–
DD
Typ.
215
150
150
Typ.
50
85
–
–
–
–
12
12
–
–
–
–
–
5
–
–
–
–
–
CY25702
0.3V
Max.
Max.
V
200
400
500
350
350
2.7
2.7
55
10
Page 3 of 6
10
10
10
50
25
25
12
–
–
DD
7
5
DD
Unit
ppm
ppm
ppm
ppm
Unit
mA
mA
mA
μA
μA
μA
pF
ms
ns
ns
ps
ps
ps
ns
ns
V
V
%