DS3231SN# Maxim Integrated Products, DS3231SN# Datasheet - Page 16

• Manufacturer Part Number: DS3231SN#
• Description: IC RTC W/TCXO 16-SOIC
• Manufacturer: Maxim Integrated Products
• Type: Clock/Calendar/TCXO/Crystalr

Specifications of DS3231SN#

• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Function: Clock/Calendar/Battery Backup
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.3 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: Serial (I2C)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Extremely Accurate I
RTC/TCXO/Crystal
Figures 3 and 4 detail how data transfer is accom-
plished on the I
the R/W bit, two types of data transfer are possible:
Figure 2. I
Figure 3. Data Write—Slave Receiver Mode
Figure 4. Data Read—Slave Transmitter Mode
16
Data transfer from a master transmitter to a slave
receiver. The first byte transmitted by the master is
slave by not generating an acknowledge bit on the
last byte that has been clocked out of the slave. In
this case, the slave must leave the data line high to
enable the master to generate the STOP condition.
SDA
SCL
____________________________________________________________________
2
IDLE
C Data Transfer Overview
S - START
A - ACKNOWLEDGE (ACK)
P - STOP
R/W - READ/WRITE OR DIRECTION BIT ADDRESS
S - START
A - ACKNOWLEDGE (ACK)
P - STOP
A - NOT ACKNOWLEDGE (NACK)
R/W - READ/WRITE OR DIRECTION BIT ADDRESS
S
S
CONDITION
START
ADDRESS>
ADDRESS>
1101000
1101000
<SLAVE
<SLAVE
2
C bus. Depending upon the state of
ADDRESS
MSB FIRST
SLAVE
0
1
<R/W>
<R/W>
1–7
A
A
<WORD ADDRESS (n)>
MASTER TO SLAVE
XXXXXXXX
<DATA (n)>
XXXXXXXX
SLAVE TO MASTER
R/W
8
ACK
9
A
A
<DATA (n + 1)>
SLAVE TO MASTER
MSB
XXXXXXXX
XXXXXXXX
<DATA (n)>
1–7
REPEATED IF MORE BYTES
2
MASTER TO SLAVE
ARE TRANSFERRED
C-Integrated
DATA
LSB
NOTE: LAST DATA BYTE IS FOLLOWED BY A NACK.
8
A
A
the slave address. Next follows a number of data
bytes. The slave returns an acknowledge bit after
each received byte. Data is transferred with the most
significant bit (MSB) first.
Data transfer from a slave transmitter to a master
receiver. The first byte (the slave address) is trans-
mitted by the master. The slave then returns an
acknowledge bit. Next follows a number of data
bytes transmitted by the slave to the master. The
(X + 1 BYTES + ACKNOWLEDGE)
(X + 1 BYTES + ACKNOWLEDGE)
ACK
<DATA (n + 2)>
<DATA (n + 1)>
9
XXXXXXXX
XXXXXXXX
DATA TRANSFERRED
DATA TRANSFERRED
MSB
1–7
A
A
DATA
...
...
LSB
<DATA (n + X)>
8
<DATA (n + X)
XXXXXXXX
XXXXXXXX
NACK
ACK/
9
STOP CONDITION
REPEATED START
A
A
P
P