M41T00SM6F STMicroelectronics, M41T00SM6F Datasheet - Page 16
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M41T00SM6F
Manufacturer Part Number
M41T00SM6F
Description
IC RTC SERIAL ACCESS 8-SOIC
Manufacturer
STMicroelectronics
Type
Clock/Calendar/NVSRAMr
Datasheet
1.M41T00SM6F.pdf
(26 pages)
Specifications of M41T00SM6F
Memory Size
8B
Time Format
HH:MM:SS (24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-6458-2
M41T00SM6F
M41T00SM6F
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M41T00SM6F
Manufacturer:
ST
Quantity:
20 000
3.2.3
Note:
3.2.4
16/26
In the event the OF bit is found to be set to '1' at any time other than the initial power-up, the
STOP bit (ST) should be written to a '1,' then immediately reset to '0.' This will restart the
oscillator.
The following conditions can cause the OF bit to be set:
●
●
●
●
The OF bit will remain set to '1' until written to logic '0.' The oscillator must start and have
run for at least 4 seconds before attempting to reset the OF Bit to '0.'
Output driver pin
When the FT bit is not set, the FT/OUT pin becomes an output driver that reflects the
contents of D7 of the calibration register. In other words, when D7 (OUT Bit) and D6 (FT bit)
of address location 07h are a '0,' then the FT/OUT pin will be driven low.
The FT/OUT pin is an open drain which requires an external pull-up resistor.
Preferred initial power-on default
Upon initial application of power to the device, the ST and FT bits are set to a '0' state, and
the OF and OUT bits will be set to a '1.' All other register bits will initially power-on in a
random state (see
Table 3.
1. State of other control bits undefined.
2. UC = Unchanged
Initial power-up
Subsequent power-up (with battery backup)
The first time power is applied (defaults to a '1' on power-up).
The voltage present on V
The ST bit is set to '1.'
External interference of the crystal.
Preferred default values
(1)
Condition
Table
3).
CC
is insufficient to support oscillation.
(2)
UC
ST
0
Out
UC
1
FT
0
0
OF
UC
1