M48T37Y-70MH1E STMicroelectronics, M48T37Y-70MH1E Datasheet - Page 9

• Manufacturer Part Number: M48T37Y-70MH1E
• Description: IC TIMEKPR NVRAM 256KBIT5V 44SOH
• Manufacturer: STMicroelectronics
• Series: Timekeeper®r
• Type: Clock/Calendar/NVSRAMr

Specifications of M48T37Y-70MH1E

• Memory Size: 256K (32K x 8)
• Time Format: HH:MM:SS (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-SOH
• Bus Type: Parallel
• User Ram: 32KB
• Operating Supply Voltage (typ): 5V
• Package Type: SOH
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 44
• Mounting: Surface Mount
• Memory Configuration: 32K X 8
• Nvram Features: RTC
• Interface Type: Parallel
• Access Time: 70ns
• Supply Voltage Range: 4.5V To 5.5V
• Memory Case Style: SOIC
• No. Of Pins: 44
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-2854-5; M48T37Y-70MH1

WRITE Mode
The M48T37Y/V is in the WRITE Mode whenever
W and E are low. The start of a WRITE is refer-
enced from the latter occurring falling edge of W or
E. A WRITE is terminated by the earlier rising
edge of W or E. The addresses must be held valid
throughout the cycle. E or W must return high for
a minimum of t
from WRITE Enable prior to the initiation of anoth-
Figure 6. WRITE Enable Controlled, WRITE AC Waveform
Figure 7. Chip Enable Controlled, WRITE AC Waveforms
A0-A14
E
W
DQ0-DQ7
A0-A14
E
W
DQ0-DQ7
EHAX
from Chip Enable or t
tAVEL
tAVEL
tAVWL
tAVWL
tWLQZ
WHAX
tAVWH
tAVEH
tWLWH
tAVAV
tAVAV
VALID
VALID
tELEH
er READ or WRITE cycle. Data-in must be valid t
VWH
t
WRITE cycles to avoid bus contention; however, if
the output bus has been activated by a low on E
and G, a low on W will disable the outputs t
after W falls.
WHDX
prior to the end of WRITE and remain valid for
tDVEH
tDVWH
afterward. G should be kept high during
DATA INPUT
DATA INPUT
tWHDX
tEHDX
tWHQX
M48T37Y, M48T37V
tEHAX
tWHAX
AI00926
AI00927
WLQZ
9/29
D-