MAX5863ETM+ Maxim Integrated Products, MAX5863ETM+ Datasheet - Page 20

IC AFE 8/10BIT 7.5MSPS 48-TQFN

MAX5863ETM+

Manufacturer Part Number
MAX5863ETM+
Description
IC AFE 8/10BIT 7.5MSPS 48-TQFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX5863ETM+

Number Of Bits
8, 10
Number Of Channels
8
Power (watts)
22.8mW
Voltage - Supply, Analog
2.7 V ~ 3.3 V
Voltage - Supply, Digital
1.8 V ~ 3.3 V
Package / Case
48-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Ultra-Low-Power, High-Dynamic
Performance, 7.5Msps Analog Front End
Figure 8. Balun-Transformer Coupled Differential to Single-
Ended Output Drive for DACs
Figure 9. Single-Ended Drive for ADCs
20
V
V
IN
IN
______________________________________________________________________________________
100Ω
100Ω
100Ω
100Ω
MAX5863
0.1µF
0.1µF
QD+
REFN
REFN
QD-
REFP
REFP
ID+
ID-
1kΩ
1kΩ
1kΩ
1kΩ
R
50Ω
R
50Ω
0.1µF
0.1µF
ISO
ISO
22pF
22pF
22pF
22pF
50Ω
C
50Ω
C
R
R
C
C
ISO
IN
ISO
IN
IN
IN
V
V
OUT
OUT
INA+
COM
INA-
INB+
INB-
MAX5863
Drive the MAX5863 ADCs with op amps when a balun
transformer is not available.
ADCs being driven by op amps for AC-coupled single-
ended, and DC-coupled differential applications.
Amplifiers such as the MAX4354/MAX4454 provide
high speed, high bandwidth, low noise, and low distor-
tion to maintain the input signal integrity.
also be used to interface with the DAC differential ana-
log outputs to provide gain or buffering. The DAC dif-
ferential analog outputs cannot be used in single-
ended mode because of the internally generated
1.4VDC common-mode level. Also, the DAC analog
outputs are designed to drive a differential input stage
with input impedance ≥70kΩ. If single-ended outputs
are desired, use an amplifier to provide differential to
single-ended conversion and select an amplifier with
proper input common-mode voltage range.
The MAX5863 can be used in diverse applications
operating FDD or TDD modes. The MAX5863 operates
in Xcvr mode for FDD applications such as WCDMA-
3GPP (FDD) and 4G technologies. Also, the MAX5863
can switch between Tx and Rx modes for TDD applica-
tions like TD-SCDMA, WCDMA-3GPP (TDD),
IEEE802.11a/b/g, and IEEE802.16.
In FDD mode, the ADC and DAC operate simultaneously.
The ADC bus and DAC bus are dedicated and must be
connected in 18-bit parallel (8-bit ADC and 10-bit DAC)
to the digital baseband processor. Select Xcvr mode
through the 3-wire serial interface and use the conver-
sion clock to latch data. In FDD mode, the MAX5863
uses 21mW power at f
power of the ADC and DAC operating simultaneously.
In TDD mode, the ADC and DAC operate independent-
ly. The ADC and DAC bus are shared and can be con-
nected together, forming a single 10-bit parallel bus to
the digital baseband processor. Using the 3-wire serial
interface, select between Rx mode to enable the ADC
and Tx mode to enable the DAC. When operating in Rx
mode, the DAC does not transmit because the core is
disabled, and in Tx mode the ADC bus is tri-state. This
eliminates any unwanted spurious emissions and pre-
vents bus contention. In TDD mode, the MAX5863 uses
14mW power in Rx mode at f
DAC uses 17mW in Tx mode.
Figure 11 illustrates the MAX5863 working with the
MAX2391 and MAX2395 in TDD mode to provide a
complete radio front-end solution. Because the
MAX5863 DAC has full differential analog outputs with
a common-mode level of 1.4V, it can interface directly
CLK
Using Op-Amp Coupling
= 5.2MHz. This is the total
Figures 9 and 10
FDD and TDD Modes
CLK
= 5.2MHz, and the
Figure 10
show the
can

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