MAX5863ETM+ Maxim Integrated Products, MAX5863ETM+ Datasheet - Page 6

IC AFE 8/10BIT 7.5MSPS 48-TQFN

MAX5863ETM+

Manufacturer Part Number
MAX5863ETM+
Description
IC AFE 8/10BIT 7.5MSPS 48-TQFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX5863ETM+

Number Of Bits
8, 10
Number Of Channels
8
Power (watts)
22.8mW
Voltage - Supply, Analog
2.7 V ~ 3.3 V
Voltage - Supply, Digital
1.8 V ~ 3.3 V
Package / Case
48-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Ultra-Low-Power, High-Dynamic
Performance, 7.5Msps Analog Front End
ELECTRICAL CHARACTERISTICS (continued)
(V
DAC output amplitude = 0dBFS, differential ADC input, differential DAC output, C
otherwise noted. Typical values are at T
6
Idle Wake-Up Time (with CLK)
Standby Wake-Up Time
Enable Time from Xcvr or Tx to
Rx
Enable Time from Xcvr or Rx to
Tx
INTERNAL REFERENCE (REFIN = V
Positive Reference
Negative Reference
Common-Mode Output Voltage
Differential Reference Output
Differential Reference
Temperature Coefficient
Maximum REFP/REFN/COM
Source Current
Maximum REFP/REFN/COM
Sink Current
BUFFERED EXTERNAL REFERENCE (REFIN = 1.024V. V
Reference Input
Differential Reference Output
Common-Mode Output Voltage
Maximum REFP/REFN/COM
Source Current
Maximum REFP/REFN/COM
Sink Current
REFIN Input Resistance
REFIN Input Current
DIGITAL INPUTS (CLK, SCLK, DIN, CS, DD0–DD9)
Input High Threshold
DD
_______________________________________________________________________________________
= 3V, OV
PARAMETER
DD
= 1.8V, internal reference (1.024V), C
t
t
t
ENABLE, Tx
SYMBOL
WAKE,ST0
WAKE,ST1
t
I
I
DD
ENABLE,
SOURCE
SOURCE
REFTC
A
V
V
V
V
V
I
I
V
REFIN
SINK
SINK
= +25°C, unless otherwise noted.) (Note 1)
COM
COM
DIFF
Rx
. V
REF
INH
REFP
, V
From idle to Rx mode with CLK present
during idle, Figure 6, ADC settles to within
1dB SINAD
From idle to Tx mode with CLK present
during idle, Figure 6, DAC settles to 10 LSB
error
From standby to Rx mode, Figure 6, ADC
settles to within 1dB SINAD
From standby to Tx mode, Figure 6, DAC
settles to 10 LSB error
ADC settles to within 1dB SINAD
DAC settles to 10 LSB error
V
V
V
V
DD0–DD9, CLK, SCLK, DIN, CS
REFN
REFP
REFN
REFP
REFP
L
, and V
≈ 10pF on all digital outputs, f
- V
- V
- V
- V
COM
REFN
REFN
COM
REFP
COM
, V
CONDITIONS
REFN
are generated internally.)
, and V
COM
REFP
are generated internally.)
CLK
= C
= 7.5MHz, ADC input amplitude = -0.5dBFS,
REFN
0.7 x
OV
= C
V
+0.49
- 0.15
DD
MIN
DD
COM
/ 2
= 0.33µF, Xcvr mode, unless
V
+0.512 +0.534
V
-0.256
0.256
1.024
0.512
>500
DD
DD
TYP
-0.7
±30
10
10
10
40
10
10
2
2
2
2
/ 2
/ 2
V
+ 0.15
MAX
DD
/ 2
ppm/°C
UNITS
mA
mA
mA
mA
kΩ
µA
µs
µs
µs
µs
V
V
V
V
V
V
V
V

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