LTC2498IUHF#PBF Linear Technology, LTC2498IUHF#PBF Datasheet - Page 29
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LTC2498IUHF#PBF
Manufacturer Part Number
LTC2498IUHF#PBF
Description
IC ADC 24BIT 16CH 38-QFN
Manufacturer
Linear Technology
Datasheet
1.LTC2498CUHFPBF.pdf
(38 pages)
Specifications of LTC2498IUHF#PBF
Number Of Bits
24
Sampling Rate (per Second)
7.5
Data Interface
MICROWIRE™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
480µW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
38-WFQFN, Exposed Pad
Number Of Elements
1
Resolution
24Bit
Architecture
Delta-Sigma
Sample Rate
0.008KSPS
Input Polarity
Bipolar
Input Type
Voltage
Rated Input Volt
±2.75V
Differential Input
Yes
Power Supply Requirement
Single
Single Supply Voltage (typ)
3.3/5V
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Integral Nonlinearity Error
10ppm of Vref
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
38
Package Type
QFN EP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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applications inForMation
independent of external settling errors. This allows direct
digitization of high impedance sensors without the need
of buffers.
The switching algorithm forces the average input current
on the positive input (I
current in the negative input (I
conversion cycle, the average input current (I
is zero. While the differential input current is zero, the
common mode input current (I
to the difference between the common mode input volt-
age (V
(V
In applications where the input common mode voltage is
equal to the reference common mode voltage, as in the
case of a balanced bridge, both the differential and com-
mon mode input current are zero. The accuracy of the
converter is not compromised by settling errors.
In applications where the input common mode voltage is
constant but different from the reference common mode
voltage, the differential input current remains zero while
the common mode input current is proportional to the
difference between V
common mode voltage of 2.5V and an input common mode
of 1.5V, the common mode input current is approximately
0.74µA (in simultaneous 50Hz/60Hz rejection mode). This
common mode input current does not degrade the accuracy
if the source impedances tied to IN
Mismatches in source impedance lead to a fixed offset
error but do not effect the linearity or full scale reading.
A 1% mismatch in a 1k source resistance leads to a 74µV
shift in offset voltage.
In applications where the common mode input voltage
varies as a function of the input signal level (single ended
type sensors), the common mode input current varies
proportionally with input voltage. For the case of balanced
input impedances, the common mode input current effects
are rejected by the large CMRR of the LTC2498, leading
to little degradation in accuracy. Mismatches in source
impedances lead to gain errors proportional to the dif-
ference between the common mode input and common
mode reference. 1% mismatches in 1k source resistances
REF(CM)
IN(CM)
).
) and the common mode reference voltage
IN(CM)
IN
+
) to be equal to the average input
and V
IN
+
IN
REF(CM)
+ I
–
+
). Over the complete
and IN
IN
–
)/2 is proportional
. For a reference
–
are matched.
IN
+
– I
IN
–
)
lead to gain errors on the order of 15ppm. Based on the
stability of the internal sampling capacitors and the ac-
curacy of the internal oscillator, a one-time calibration will
remove this error.
In addition to the input sampling current, the input ESD
protection diodes have a temperature dependent leakage
current. This current, nominally 1nA (±10nA max) results
in a small offset shift. A 1k source resistance will create a
1µV typical and a 10µV maximum offset voltage.
Automatic Offset Calibration of External Buffers/
Amplifiers
In addition to the Easy Drive input current cancellation,
the LTC2498 enables an external amplifier to be inserted
between the multiplexer output and the ADC input, see
Figure 13. This is useful in applications where balanced
source impedances are not possible. One pair of external
buffers/amplifiers can be shared between all 17 analog
inputs. The LTC2498 performs an internal offset calibration
every conversion cycle in order to remove the offset and
drift of the ADC. This calibration is performed through a
combination of front end switching and digital process-
ing. Since the external amplifier is placed between the
multiplexer and the ADC, it is inside this correction loop.
This results in automatic offset correction and offset drift
removal of the external amplifier.
ANALOG
INPUTS
Figure 13. External Buffers Provide High Impedance Inputs and
Amplifier Offsets are Automatically Cancelled.
17
INPUT
MUX
2
3
6
5
–
+
–
+
1/2 LTC6078
1/2 LTC6078
LTC2498
1
7
1k
1k
LTC2498
EASY DRIVE
ΔΣ ADC
INPUTS
WITH
0.1µF
0.1µF
SDO
SCK
2498 F13
SDI
CS
2498fe