AD1871YRSZ Analog Devices Inc, AD1871YRSZ Datasheet - Page 5

• Manufacturer Part Number: AD1871YRSZ
• Description: IC ADC STEREO AUDIO 24BIT 28SSOP
• Manufacturer: Analog Devices Inc

Specifications of AD1871YRSZ

• Data Interface: Serial, SPI™
• Number Of Bits: 24
• Sampling Rate (per Second): 96k
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP (0.200", 5.30mm Width)
• Resolution (bits): 24bit
• Sampling Rate: 96kSPS
• Input Channel Type: Differential
• Supply Voltage Range - Analog: 4.5V To 5.5V
• Supply Current: 40mA
• Digital Ic Case Style: SSOP
• Number Of Elements: 2
• Resolution: 24Bit
• Architecture: Delta-Sigma
• Sample Rate: 96KSPS
• Input Polarity: Bipolar
• Input Type: Voltage
• Rated Input Volt: ±2.828V
• Differential Input: Yes
• Power Supply Requirement: Analog and Digital
• Single Supply Voltage (typ): 5V
• Single Supply Voltage (min): 4.5V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 28
• Package Type: SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

DATA INTERFACE TIMING (STANDALONE MODE–MASTER)
Mnemonic
t
t
t
REV. 0
BDLY
BLDLY
BDDLY
RIGHT-JUSTIFIED
LEFT-JUSTIFIED
I
2
S-JUSTIFIED
LRCLK
MODE
MODE
MODE
DOUT
DOUT
DOUT
BCLK
MCLK
Description
BCLK Delay
LRCLK Delay to Low
DOUT Delay
t
BDLY
t
BLDLY
t
BDDLY
12-BIT CLOCKS
16-BIT CLOCKS
8-BIT CLOCKS
(24-BIT DATA)
(20-BIT DATA)
(16-BIT DATA)
MSB
Figure 2. Master Data Interface Timing
MSB–
MSB
1
Min
20
10
10
Typ
–5–
Max
MSB
Unit
ns
ns
ns
Comment
From MCLK Rising
From BCLK Falling
From BCLK Falling
LSB
AD1871