AD7730BRZ Analog Devices Inc, AD7730BRZ Datasheet - Page 50

• Manufacturer Part Number: AD7730BRZ
• Description: IC ADC BRIDGE TRANSDUCER 24-SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD7730BRZ

• Data Interface: DSP, Serial, SPI™
• Number Of Bits: 24
• Sampling Rate (per Second): 1.2k
• Number Of Converters: 1
• Power Dissipation (max): 125mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (0.300", 7.50mm Width)
• Resolution (bits): 24bit
• Sampling Rate: 1.2kSPS
• Input Channel Type: Differential, Single Ended
• Supply Voltage Range - Analog: 4.75V To 5.25V
• Package: 24SOIC W
• Resolution: 24 Bit
• Architecture: Delta-Sigma
• Number Of Adcs: 1
• Number Of Analog Inputs: 2
• Digital Interface Type: Serial (3-Wire, SPI)
• Input Type: Voltage
• Signal To Noise Ratio: 123 dB
• Polarity Of Input Voltage: Unipolar|Bipolar
• Number Of Elements: 1
• Sample Rate: 1.2KSPS
• Input Polarity: Unipolar/Bipolar
• Differential Input: Yes
• Power Supply Requirement: Analog and Digital
• Single Supply Voltage (typ): 5V
• Single Supply Voltage (min): 4.75V
• Single Supply Voltage (max): 5.25V
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Power Dissipation: 125mW
• Integral Nonlinearity Error: 18ppm of FSR
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 24
• Package Type: SOIC W
• Input Signal Type: Differential
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-AD7730LEBZ - BOARD EVALUATION FOR AD7730EVAL-AD7730EBZ - BOARD EVAL FOR AD7730
• Lead Free Status / Rohs Status: Compliant

AD7730/AD7730L
PAGE INDEX
Topic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Page
FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . 1
AD7730 SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . 2
TIMING CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . 4
ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . 5
ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
DETAILED FUNCTIONAL BLOCK DIAGRAM . . . . . . . 6
SIGNAL PROCESSING CHAIN . . . . . . . . . . . . . . . . . . . . . 7
PIN CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
PIN FUNCTION DESCRIPTION . . . . . . . . . . . . . . . . . . . 7
TERMINOLOGY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
OUTPUT NOISE AND RESOLUTION
ON-CHIP REGISTERS . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
READING FROM AND WRITING TO THE
CALIBRATION OPERATION SUMMARY . . . . . . . . . . . 22
CIRCUIT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . 23
ANALOG INPUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
REFERENCE INPUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
SIGMA-DELTA MODULATOR . . . . . . . . . . . . . . . . . . . . 26
DIGITAL FILTERING . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
CALIBRATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
USING THE AD7730 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
POWER SUPPLIES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
SPECIFICATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Summary Of On-Chip Registers . . . . . . . . . . . . . . . . . . . . 12
Communications Register . . . . . . . . . . . . . . . . . . . . . . . . 13
Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Mode Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Filter Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
DAC Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Offset Calibration Register . . . . . . . . . . . . . . . . . . . . . . . . 20
Gain Calibration Register . . . . . . . . . . . . . . . . . . . . . . . . . 20
Test Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
ON-CHIP REGISTERS. . . . . . . . . . . . . . . . . . . . . . . . . . 21
Analog Input Channels . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Analog Input Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Bipolar/Unipolar Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Burnout Currents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Reference Detect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Filter Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
First Stage Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Second Stage Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Internal Zero-Scale Calibration . . . . . . . . . . . . . . . . . . . . 30
Internal Full-Scale Calibration . . . . . . . . . . . . . . . . . . . . . 30
System Zero-Scale Calibration . . . . . . . . . . . . . . . . . . . . . 31
System Full-Scale Calibration . . . . . . . . . . . . . . . . . . . . . 31
Span and Offset Limits . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Power-Up and Calibration . . . . . . . . . . . . . . . . . . . . . . . . 32
Drift Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Clocking and Oscillator Circuit . . . . . . . . . . . . . . . . . . . . 32
System Synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Single-Shot Conversions . . . . . . . . . . . . . . . . . . . . . . . . . 33
Reset Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Standby Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Digital Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Grounding and Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Evaluating the AD7730 Performance . . . . . . . . . . . . . . . . 34
–50–
SERIAL INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
CONFIGURING THE AD7730 . . . . . . . . . . . . . . . . . . . . . 37
MICROCOMPUTER/MICROPROCESSOR
APPLICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
APPENDIX A–AD7730L SPECIFICATIONS . . . . . . . . . . 43
SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
INDEX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . 51
TABLE INDEX
Table
Table I.
Table II.
Table III.
Table IV.
Table V.
Table VI.
Table VII.
Table VIII.
Table IX.
Table X.
Table XI.
Table XII.
Table XIII.
Table XIV.
Table XV.
Table XVI.
Table XVII.
Table XVIII.
Table XIX.
Table XX.
Table XXI.
Table XXII.
Table XXIII.
Table XXIV.
Write Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Read Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
INTERFACING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
AD7730 to 68HC11 Interface . . . . . . . . . . . . . . . . . . . . . 38
AD7730 to 8051 Interface . . . . . . . . . . . . . . . . . . . . . . . . 38
AD7730 to ADSP-2105 Interface . . . . . . . . . . . . . . . . . . 39
DC Excitation of Bridge . . . . . . . . . . . . . . . . . . . . . . . . . . 40
AC Excitation of Bridge . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Bipolar Excitation of Bridge . . . . . . . . . . . . . . . . . . . . . . . 42
Title
Output Noise vs. Input Range and
Update Rate (CHP = 1)
Peak-to-Peak Resolution vs. Input Range
and Update Rate (CHP = 1)
Output Noise vs. Input Range and
Update Rate (CHP = 0)
Peak-to-Peak Resolution vs. Input Range
and Update Rate (CHP = 0)
Summary of On-Chip Registers
Communications Register
Read/Write Mode
Register Selection
Status Register
Mode Register
Operating Modes
Input Range Selection
Channel Selection
Filter Register
SF Ranges
DAC Register
Calibration Operations
Reset Events
Pseudo-Code for Initiating a
Self-Calibration after Power-On/Reset
Pseudo-Code for Setting Up AD7730 for
Continuous Conversion and Continuous
Read Operation
Output Noise vs. Input Range and
Update Rate (CHP = 1)
Peak-to-Peak Resolution vs. Input Range
and Update Rate (CHP = 1)
Output Noise vs. Input Range and
Update Rate (CHP = 0)
Peak-to-Peak Resolution vs. Input Range
and Update Rate (CHP = 0)
REV. A
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