CS5534-BSZ Cirrus Logic Inc, CS5534-BSZ Datasheet - Page 17

IC ADC 24BIT 4CH W/LNA 20SSOP

CS5534-BSZ

Manufacturer Part Number
CS5534-BSZ
Description
IC ADC 24BIT 4CH W/LNA 20SSOP
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CS5534-BSZ

Number Of Converters
1
Package / Case
24-SSOP
Number Of Bits
24
Sampling Rate (per Second)
3.84k
Data Interface
Serial
Power Dissipation (max)
45mW
Voltage Supply Source
Analog and Digital, Dual ±
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Adc Inputs
4
Architecture
Delta-Sigma
Conversion Rate
6.25 SPs to 3840 SPs
Resolution
24 bit
Input Type
Voltage
Interface Type
Serial (3-Wire)
Voltage Reference
2.5 V
Maximum Power Dissipation
500 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1016 - EVAL BOARD FOR CS5534
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1116-5

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2.2.2. Command Register Quick Reference
DS289F5
BIT
D7
D6
D5-D4
D3
D2-D0
BIT
D7
D6
D5-D3
D2-D0
D7(MSB)
D7(MSB)
1
0
NAME
Command Bit, C
Access Registers as
Arrays, ARA
Channel Select Bits,
CS1-CS0
Read/Write, R/W
Register Select Bit,
RSB3-RSB0
NAME
Command Bit, C
Multiple Conver-
sions, MC
Channel-Setup Reg-
ister Pointer Bits,
CSRP
Conversion/Calibra-
tion Bits, CC2-CC0
ARA
MC
D6
D6
VALUE FUNCTION
VALUE FUNCTION
000
001
010
011
101
110
111
00
01
10
CSRP2
11
000
000
001
010
011
100
101
110
111
111
0
1
0
1
0
1
...
0
1
0
1
CS1
D5
D5
Must be logic 0 for these commands.
These commands are invalid if this bit is logic 1.
Ignore this function.
Access the respective registers, offset, gain, or channel-setup, as an array of regis-
ters. The particular registers accessed are determined by the RS bits. The registers
are accessed MSB first with physical channel 0 accessed first followed by physical
channel 1 next and so forth.
CS1-CS0 provide the address of one of the two (four for CS5533/34) physical input
channels. These bits are also used to access the calibration registers associated
with the respective physical input channel. Note that these bits are ignored when
reading data register.
Write to selected register.
Read from selected register.
Reserved
Offset Register
Gain Register
Configuration Register
Channel-Setup Registers
Reserved
Reserved
These commands are invalid if this bit is logic 0.
Must be logic 1 for these commands.
Perform fully settled single conversions.
Perform conversions continuously.
These bits are used as pointers to the Channel-Setup registers. Either a single con-
version or continuous conversions are performed on the channel setup register
pointed to by these bits.
Normal Conversion
Self-Offset Calibration
Self-Gain Calibration
Reserved
Reserved
System-Offset Calibration
System-Gain Calibration
Reserved
CSRP1
CS0
D4
D4
CSRP0
R/W
D3
D3
RSB2
CC2
D2
D2
CS5531/32/33/34-AS
RSB1
CC1
D1
D1
RSB0
CC0
D0
D0
17

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