CS5534-BSZ Cirrus Logic Inc, CS5534-BSZ Datasheet - Page 27

IC ADC 24BIT 4CH W/LNA 20SSOP

CS5534-BSZ

Manufacturer Part Number
CS5534-BSZ
Description
IC ADC 24BIT 4CH W/LNA 20SSOP
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CS5534-BSZ

Number Of Converters
1
Package / Case
24-SSOP
Number Of Bits
24
Sampling Rate (per Second)
3.84k
Data Interface
Serial
Power Dissipation (max)
45mW
Voltage Supply Source
Analog and Digital, Dual ±
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Adc Inputs
4
Architecture
Delta-Sigma
Conversion Rate
6.25 SPs to 3840 SPs
Resolution
24 bit
Input Type
Voltage
Interface Type
Serial (3-Wire)
Voltage Reference
2.5 V
Maximum Power Dissipation
500 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1016 - EVAL BOARD FOR CS5534
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1116-5

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2.4. Setting up the CSRs for a Measurement
The CS5531/32/33/34 have four channel-setup reg-
isters (CSRs). Each CSR contains two 16-bit Setups
which are programmed by the user to contain data
conversion information such as: 1) which physical
channel will be converted, 2) at what gain will the
channel be converted, 3) at what word rate will the
channel be converted, 4) will the output conversion
be unipolar or bipolar, 5) what will be the state of the
output latch during the conversion, 6) will the con-
verter delay the start of a conversion to allow time
for the output latch to settle before the conversion is
begun, and 7) will the open circuit detect current
source be activated for that Setup. In addition, when
the OGS bit in the Configuration Register is set, the
Setup selects which set of offset and gain registers to
use when performing conversions or calibrations.
Note that a particular physical input channel can be
DS289F5
Filter Rate Select, FRS[19]
NU (Not Used)[18:0]
0
1
0
Use the default output word rates.
Scale all output word rates and their corresponding filter characteristics by a factor of 5/6.
Must always be logic 0. Reserved for future upgrades.
represented in more than one Setup with different
output rates, gain ranges, etc. (i.e. each Setup is in-
dependently defined). Refer to section 2.4.1 for
more details about the Channel Setup Registers.
Each 32-bit CSR is individually accessible and
contains two 16-bit Setups. As an example, to con-
figure Setup 1 in the CS5531/32/33/34 with the
write individual channel-setup register command
(0x05 hexadecimal), bits 31 to 16 of CSR 1 con-
tains the information for Setup 1 and bits 15 to 0
contain the information for Setup 2. Note that while
reading/writing CSRs, two Setups are accessed in
pairs as a single 32-bit CSR register. Even if one of
the Setups isn’t used, it must be written to or read.
Examples detailing the power of the CSRs are pro-
vided in section 2.6.3.
CS5531/32/33/34-AS
27

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