AD7194BCPZ Analog Devices Inc, AD7194BCPZ Datasheet - Page 3

IC ADC 24BIT SPI 4.8K 32-LFCSP

AD7194BCPZ

Manufacturer Part Number
AD7194BCPZ
Description
IC ADC 24BIT SPI 4.8K 32-LFCSP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7194BCPZ

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Bits
24
Sampling Rate (per Second)
4.8k
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
32-WFQFN, CSP Exposed Pad
Resolution (bits)
24bit
Input Channel Type
Pseudo Differential
Supply Voltage Range - Analogue
3V To 5.25V
Supply Voltage Range - Digital
2.7V To 5.25V
Supply
RoHS Compliant
Sampling Rate
4.8kSPS
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AD7194BRUZ
AD7194BRUZ

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7194BCPZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
SPECIFICATIONS
AV
MCLK = 4.92 MHz, T
Table 1.
Parameter
ADC
Output Data Rate
No Missing Codes
Resolution
RMS Noise and Output
Integral Nonlinearity
Offset Error
Offset Error Drift vs.
Gain Error
Gain Drift vs.
Power Supply Rejection
Common-Mode Rejection
DD
Data Rates
Gain = 1
Gain > 1
Temperature
Temperature
@ DC
@ DC
@ 50 Hz, 60 Hz
@ 50 Hz
@ 60 Hz
@ 50 Hz
@ 60 Hz
= 3 V to 5.25 V, DV
4
2
2
2
2
2
4 , 5
2
2
A
= T
DD
MIN
4.7
105
Min
1.17
1.56
24
24
95
120
120
120
115
115
= 2.7 V to 5.25 V, AGND = DGND = 0 V; REFINx(+) = +2.5 V or AV
to T
MAX
, unless otherwise noted.
Typ
±2
±2
±5
±15
±150/gain
±1
±0.5
±150/gain
±5
±5
±0.001
−0.4
±0.003
±0.005
±1
90
110
110
120
Rev. 0 | Page 3 of 56
Max
4800
1200
1600
±10
±15
±30
±30
Unit
Hz
Hz
Hz
Bits
Bits
ppm of FSR
ppm of FSR
ppm of FSR
ppm of FSR
μV
μV
μV
nV/°C
nV/°C
nV/°C
%
%
%
%
ppm/°C
dB
dB
dB
dB
dB
dB
dB
dB
dB
DD
, REFINx(−) = AGND,
Test Conditions/Comments
Chop disabled
Chop enabled, sinc
Chop enabled, sinc
FS[9:0]
FS[9:0]
See the RMS Noise and Resolution section
See the RMS Noise and Resolution section
AV
AV
AV
AV
Chop disabled
Chop enabled, AV
Chop enabled, AV
Gain = 1 to 16; chop disabled
Gain = 32 to 128; chop disabled
Chop enabled
AV
calibration conditions)
Gain = 128, before full-scale calibration
(see Table 27)
Gain > 1, after internal full-scale
calibration, AV
Gain > 1, after internal full-scale
calibration, AV
Gain = 1, V
Gain > 1, V
Gain = 1, V
Gain > 1, V
10 Hz output data rate, 50 Hz ± 1 Hz,
60 Hz ± 1 Hz
50 Hz output data rate, 50 Hz ± 1 Hz
60 Hz output data rate, 60 Hz ± 1 Hz
Fast settling, FS[9:0]
50 Hz ± 1 Hz
Fast settling, FS[9:0]
60 Hz ± 1 Hz
DD
DD
DD
DD
DD
= 5 V
= 3 V
= 5 V
= 3 V
= 5 V, gain = 1, T
3
3
> 4, sinc
> 1, sinc
IN
IN
IN
IN
= 1 V
= 1 V/gain
= 1 V
= 1 V/gain
DD
DD
3
4
≥ 4.75 V
< 4.75 V
filter
filter
DD
DD
4
3
3
3
filter
filter
= 5 V
= 3 V
= 6, average by 16,
= 5, average by 16,
A
= 25°C (factory
AD7194
1

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