MAX1295ACEI+ Maxim Integrated Products, MAX1295ACEI+ Datasheet - Page 16

IC ADC 12BIT 265KSPS 28-QSOP

MAX1295ACEI+

Manufacturer Part Number
MAX1295ACEI+
Description
IC ADC 12BIT 265KSPS 28-QSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1295ACEI+

Number Of Bits
12
Sampling Rate (per Second)
265k
Data Interface
Parallel
Number Of Converters
1
Power Dissipation (max)
762mW
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-QSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
acquisition cycle of the next conversion, and then read-
ing the results of the previous conversion from the bus.
This technique (Figure 10) allows a conversion to be
completed every 16 clock cycles. Note that the switch-
265ksps, +3V, 6-/2-Channel, 12-Bit ADCs
with +2.5V Reference and Parallel Interface
Figure 10. Timing Diagram for Fastest Conversion
16
Figure 11. Power-Supply and Grounding Connections
D7–D0
*R = 5Ω
STATE
CLK
WR
RD
______________________________________________________________________________________
*OPTIONAL
V
CONTROL
+3V
DD
WORD
1
4.7µF
0.1µF
; ; ;
;
ACQUISITION
2
MAX1295
MAX1297
D11–
GND
D0
3
SAMPLING INSTANT
SUPPLIES
COM
4
5
6
+3V
+3V
CIRCUITRY
DIGITAL
7
DGND
GND
8
9
CONTROL WORD
CONVERSION
10
ing of the data bus during acquisition or conversion can
cause additional supply noise, which can make it diffi-
cult to achieve true 12-bit performance.
For best performance, use printed circuit (PC) boards.
Wire-wrap configurations are not recommended since
the layout should ensure proper separation of analog
and digital traces. Do not run analog and digital lines
parallel to each other, and don’t lay out digital signal
paths underneath the ADC package. Use separate
analog and digital PC board ground sections with only
one star point (Figure 11) connecting the two ground
systems (analog and digital). For lowest noise opera-
tion, ensure the ground return to the star ground’s
power supply is low impedance and as short as possi-
ble. Route digital signals far away from sensitive analog
and reference inputs.
High-frequency noise in the power supply, V
impair operation of the ADC’s fast comparator. Bypass
V
capacitors, 0.1µF and 4.7µF, located as close as to the
MAX1295/MAX1297’s power-supply pin as possible.
Minimize capacitor lead length for best supply-noise
rejection and add an attenuation resistor (5Ω) if the
power supply is extremely noisy.
DD
11
to the star ground with a network of two parallel
12
Layout, Grounding, and Bypassing
13
14
15
16
D11–D0
ACQUISITION
DD
, could

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