LTC2410CGN Linear Technology, LTC2410CGN Datasheet - Page 15

• Manufacturer Part Number: LTC2410CGN
• Description: IC ADC 24BIT DIFF INP/REF 16SSOP
• Manufacturer: Linear Technology

Specifications of LTC2410CGN

• Number Of Bits: 24
• Sampling Rate (per Second): 7.5
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 2
• Power Dissipation (max): 1mW
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SSOP (0.150", 3.90mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: Q894257

APPLICATIO S I FOR ATIO
synchronized with an outside source, the LTC2410 can
operate with an external conversion clock. The converter
automatically detects the presence of an external clock
signal at the F
frequency f
2560Hz (1Hz notch frequency) to be detected. The exter-
nal clock signal duty cycle is not significant as long as the
minimum and maximum specifications for the high and
low periods t
While operating with an external conversion clock of a
frequency f
normal mode rejection in a frequency range f
function of the input frequency deviation from f
is shown in Figure 4.
Whenever an external clock is not present at the F
converter automatically activates its internal oscillator and
enters the Internal Conversion Clock mode. The LTC2410
operation will not be disturbed if the change of conversion
clock source occurs during the sleep state or during the
data output state while the converter uses an external
serial clock. If the change occurs during the conversion
state, the result of the conversion in progress may be
outside specifications but the following conversions will
not be affected. If the change occurs during the data output
state and the converter is in the Internal SCK mode, the
serial clock duty cycle may be affected but the serial data
stream will remain valid.
Table 3. LTC2410 State Duration
State
CONVERT
SLEEP
DATA OUTPUT
4% and its harmonics. The normal mode rejection as a
EOSC
EOSC
HEO
O
pin and turns off the internal oscillator. The
, the LTC2410 provides better than 110dB
Operating Mode
Internal Oscillator
External Oscillator
Internal Serial Clock
External Serial Clock with
Frequency f
of the external signal must be at least
and t
U
LEO
SCK
U
are observed.
kHz
W
F
(60Hz Rejection)
F
(50Hz Rejection)
F
with Frequency f
(f
F
(Internal Oscillator)
F
Frequency f
O
O
O
O
O
EOSC
= LOW
= HIGH
= External Oscillator
= LOW/HIGH
= External Oscillator with
EOSC
EOSC
/2560 Rejection)
U
O
pin, the
EOSC
/2560
/2560
EOSC
kHz
kHz
Table 3 summarizes the duration of each state and the
achievable output data rate as a function of F
SERIAL INTERFACE PINS
The LTC2410 transmits the conversion results and re-
ceives the start of conversion command through a syn-
chronous 3-wire interface. During the conversion and
sleep states, this interface can be used to assess the
converter status and during the data output state it is used
to read the conversion result.
Figure 4. LTC2410 Normal Mode Rejection When
Using an External Oscillator of Frequency f
Duration
133ms, Output Data Rate 7.5 Readings/s
160ms, Output Data Rate 6.2 Readings/s
20510/f
As Long As CS = HIGH Until CS = LOW and SCK
As Long As CS = LOW But Not Longer Than 1.67ms
(32 SCK cycles)
As Long As CS = LOW But Not Longer Than 256/f
(32 SCK cycles)
As Long As CS = LOW But Not Longer Than 32/f
(32 SCK cycles)
–100
–105
–110
–115
–120
–125
–130
–135
–140
–80
–85
–90
–95
DEVIATION FROM NOTCH FREQUENCY f
–12
EOSC
DIFFERENTIAL INPUT SIGNAL FREQUENCY
s, Output Data Rate f
–8
–4
0
4
EOSC
EOSC
/20510 Readings/s
LTC2410
8
/2560(%)
2410 F04
EOSC
12
O
SCK
.
EOSC
ms
15
ms