LTC1419AISW#PBF Linear Technology, LTC1419AISW#PBF Datasheet - Page 12

IC A/D CONV 14BIT SAMPLNG 28SOIC

LTC1419AISW#PBF

Manufacturer Part Number
LTC1419AISW#PBF
Description
IC A/D CONV 14BIT SAMPLNG 28SOIC
Manufacturer
Linear Technology
Datasheet

Specifications of LTC1419AISW#PBF

Number Of Bits
14
Sampling Rate (per Second)
800k
Data Interface
Parallel
Number Of Converters
1
Power Dissipation (max)
240mW
Voltage Supply Source
Dual ±
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (0.300", 7.50mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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LTC1419
Differential Inputs
The LTC1419 has a unique differential sample-and-hold
circuit that allows rail-to-rail inputs. The ADC will always
convert the difference of + A
common mode voltage (see Figure 11a). The common
mode rejection holds up to extremely high frequencies,
see Figure 10a. The only requirement is that both inputs
can not exceed the AV
Integral nonlinearity errors (INL) and differential nonlin-
earity errors (DNL) are independent of the common mode
voltage, however, the bipolar zero error (BZE) will vary.
The change in BZE is typically less than 0.1% of the
common mode voltage. Dynamic performance is also
affected by the common mode voltage. THD will degrade
as the inputs approach either power supply rail, from 86dB
with a common mode of 0V to 76dB with a common mode
of 2.5V or – 2.5V.
12
APPLICATIONS
Figure 10b. Selectable 0V to 5V or ±2.5V Input Range
±2.5V
80
70
60
50
40
30
20
10
0
Figure 10a. CMRR vs Input Frequency
1
ANALOG INPUT
0V TO
5V
U
10
INPUT FREQUENCY (Hz)
10µF
DD
+
or AV
INFORMATION
U
1
2
3
4
5
100
IN
+A
–A
V
REFCOMP
AGND
– (– A
REF
SS
IN
IN
LTC1419
power supply voltages.
1000
IN
W
) independent of the
1419 F10
1419 G09
10000
U
Differential inputs allow greater flexibility for accepting
different input ranges. Figure 10b shows a circuit that
converts a 0V to 5V analog input signal with only an
additional buffer that is not in the signal path.
Full-Scale and Offset Adjustment
Figure 11a shows the ideal input/output characteristics
for the LTC1419. The code transitions occur midway
between successive integer LSB values (i.e., – FS +
0.5LSB, – FS + 1.5LSB, – FS + 2.5LSB,... FS – 1.5LSB,
FS – 0.5LSB). The output is two’s complement binary with
1LSB = FS – (– FS)/16384 = 5V/16384 = 305.2µV.
In applications where absolute accuracy is important,
offset and full-scale errors can be adjusted to zero. Offset
error must be adjusted before full-scale error. Figure 11b
shows the extra components required for full-scale error
adjustment. Zero offset is achieved by adjusting the offset
50k
R8
+
5V
Figure 11b. Offset and Full-Scale Adjust Circuit
011...111
011...110
000...001
000...000
111...111
111...110
100...001
100...000
Figure 11a. LTC1419 Transfer Characteristics
10µF
R5
47k
– (FS – 1LSB)
50k
R7
24k
R3
R6
24k
INPUT VOLTAGE [+A
0.1µF
ANALOG
INPUT
R4
100Ω
IN
– (–A
4
2
3
5
1
IN
+A
–A
V
REFCOMP
AGND
FS – 1LSB
REF
)]
IN
IN
1419 F11a
LTC1419
1419 F11b
1419fb

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