LTC1419AISW#PBF Linear Technology, LTC1419AISW#PBF Datasheet - Page 4

• Manufacturer Part Number: LTC1419AISW#PBF
• Description: IC A/D CONV 14BIT SAMPLNG 28SOIC
• Manufacturer: Linear Technology

Specifications of LTC1419AISW#PBF

• Number Of Bits: 14
• Sampling Rate (per Second): 800k
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 240mW
• Voltage Supply Source: Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

POWER REQUIRE E TS
LTC1419
otherwise specifications are at T
TI I G CHARACTERISTICS
range, otherwise specifications are at T
SYMBOL
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliabilty and lifetime.
Note 2: All voltage values are with respect to ground with DGND and
AGND wired together unless otherwise noted.
Note 3: When these pin voltages are taken below V
will be clamped by internal diodes. This product can handle input currents
greater than 100mA below V
Note 4: When these pin voltages are taken below V
by internal diodes. This product can handle input currents greater than
100mA below V
to V
Note 5: V
otherwise specified.
4
SYMBOL PARAMETER
P
SAMPLE(MAX)
CONV
ACQ
ACQ + CONV
1
2
3
4
5
6
7
8
9
10
11
12
13
DIS
W
DD
.
DD
U
Power Dissipation
= 5V, V
Nap Mode
Sleep Mode
SS
PARAMETER
Maximum Sampling Frequency
Conversion Time
Acquisition Time
Acquisition + Conversion Time
CS to RD Setup Time
CS↓ to CONVST↓ Setup Time
CS↓ to SHDN↓ Setup Time
SHDN↑ to CONVST↓ Wake-Up Time (Note 10)
CONVST Low Time
CONVST to BUSY Delay
Data Ready Before BUSY↑
Delay Between Conversions
Wait Time RD↓ After BUSY↑
Data Access Time After RD↓
Bus Relinquish Time
RD Low Time
CONVST High Time
without latchup. These pins are not clamped
SS
= – 5V, f
SS
SAMPLE
or above V
A
W U
= 800kHz, t
= 25°C. (Note 5)
DD
without latchup.
A
= 25°C. (Note 5)
r
SS
SS
= t
, they will be clamped
or above V
f
= 5ns unless
The
CONDITIONS
(Notes 9, 10)
(Notes 9, 10)
(Notes 9, 10)
(Notes 10, 11)
C
(Note 10)
(Note 9)
C
C
0°C ≤ T
– 40°C ≤ T
CONDITIONS
SHDN = 0V, CS = 0V
SHDN = 0V, CS = 5V
L
L
L
= 25pF
= 25pF
= 100pF
The
●
denotes specifications which apply over the full operating temperature range,
A
●
DD
≤ 70°C
A
denotes specifications which apply over the full operating temperature
, they
≤ 85°C
Note 6: Linearity, offset and full-scale specifications apply for a single-
ended +A
Note 7: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8: Bipolar offset is the offset voltage measured from – 0.5LSB
when the output code flickers between 0000 0000 0000 00 and
1111 1111 1111 11.
Note 9: Guaranteed by design, not subject to test.
Note 10: Recommended operating conditions.
Note 11: The falling edge of CONVST starts a conversion. If CONVST
returns high at a critical point during the conversion it can create small
errors. For best performance ensure that CONVST returns high either
within 650ns after the start of the conversion or after BUSY rises.
IN
input with – A
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
IN
grounded.
MIN
800
MIN
– 5
t
40
40
40
20
15
40
40
0
10
1040
TYP
950
400
TYP
150
90
20
50
15
20
10
7.5
1.2
1150
1250
MAX
MAX
300
240
50
25
35
35
50
20
25
30
12
UNITS
UNITS
1419fb
mW
mW
mW
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns