ADC1175CIMTCX/NOPB National Semiconductor, ADC1175CIMTCX/NOPB Datasheet - Page 12

• Manufacturer Part Number: ADC1175CIMTCX/NOPB
• Description: ADC 8BIT 20MHZ 60MW 24-TSSOP
• Manufacturer: National Semiconductor

Specifications of ADC1175CIMTCX/NOPB

• Number Of Bits: 8
• Sampling Rate (per Second): 20M
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 60mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -20°C ~ 75°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP (0.173", 4.40mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADC1175CIMTCX

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Functional Description
The ADC1175 uses a new, unique architecture to achieve 7.2
effective bits at and maintains superior dynamic performance
up to ½ the clock frequency.
The analog signal at V
by V
Input voltages below V
of all zeroes. Input voltages above V
word to consist of all ones. V
analog supply voltage, AV
4.0 Volts. V
Volts more positive than V
If V
connected together, the nominal values of V
2.6V and 0.6V, respectively. If V
together and V
2.3V.
Data is acquired at the falling edge of the clock and the digital
equivalent of the data is available at the digital outputs 2.5
clock cycles plus t
as the clock signal is present at pin 12. The Output Enable
pin OE, when low, enables the output pins. The digital outputs
are in the high impedance state when the OE pin is high.
Applications Information
1.0 THE ANALOG INPUT
The analog input of the ADC1175 is a switch followed by an
integrator. The input capacitance changes with the clock lev-
el, appearing as 4 pF when the clock is low, and 11 pF when
the clock is high. Since a dynamic capacitance is more difficult
to drive than a fixed capacitance, choose an amplifier that can
drive this type of load. The LMH6702, LMH6609, LM6152,
LM6154, LM6181 and LM6182 have been found to be excel-
lent devices for driving the ADC1175. Do not drive the input
beyond the supply rails. Figure 3 shows an example of an
input circuit using the LMH6702.
Driving the analog input with input signals up to 2.8 V
result in normal behavior where signals above V
in a code of FFh and input voltages below V
output code of zero. Input signals above 2.8 V
in odd behavior where the output code is not FFh when the
input exceeds V
2.0 REFERENCE INPUTS
The reference inputs V
ence Bottom) are the top and bottom of the reference ladder.
RT
RT
and V
and V
RTS
RT
RB
should always be between 1.0 Volt and 2.8
RB
are connected together and V
RT
are digitized to eight bits at up to 30 MSPS.
OD
.
is grounded, the nominal value of V
later. The ADC1175 will convert as long
RB
IN
RT
will cause the output word to consist
that is within the voltage range set
RB
DD
(Reference Top) and V
RT
.
, while V
has a range of 1.0 Volt to the
RT
and V
RT
RB
will cause the output
has a range of 0 to
RTS
RB
RB
RT
are connected
will result in an
P-P
and V
and V
RT
may result
RB
will result
RBS
(Refer-
P-P
RB
RT
are
are
will
is
12
Input signals between these two voltages will be digitized to
8 bits. External voltages applied to the reference input pins
should be within the range specified in the Operating Ratings
table (1.0V to AV
Any device used to drive the reference pins should be able to
source sufficient current into the V
current from the V
The reference ladder can be self-biased by connecting V
V
reference voltages of approximately 2.6V and 0.6V, respec-
tively, with V
3. If V
ground, a top reference voltage of approximately 2.3V is gen-
erated. The top and bottom of the ladder should be bypassed
with 10µF tantalum capacitors located close to the reference
pins.
The reference self-bias circuit of Figure 3 is very simple and
performance is adequate for many applications. Superior per-
formance can generally be achieved by driving the reference
pins with a low impedance source.
By forcing a little current into or out of the top and bottom of
the ladder, as shown in Figure 4, the top and bottom reference
voltages can be trimmed and performance improved over the
self-bias method of Figure 3. The resistive divider at the am-
plifier inputs can be replaced with potentiometers. The
LMC662 amplifier shown was chosen for its low offset voltage
and low cost. Note that a negative power supply is needed for
these amplifiers if their outputs are required to go slightly
negative to force the required reference voltages.
If reference voltages are desired that are more than a few tens
of millivolts from the self-bias values, the circuit of Figure 5
will allow forcing the reference voltages to whatever levels are
desired. This circuit provides the best performance because
of the low source impedance of the transistors. Note that the
V
V
supply voltage, and V
and 1.0V below V
accurate conversions, the total reference voltage range (V
- V
2.8V. If V
-5V points in Figure 5 can be returned to ground and the neg-
ative supply eliminated.
RTS
RTS
RT
RB
can be anywhere between V
) should be a minimum of 1.0V and a maximum of about
and V
and connecting V
RT
and V
RB
RBS
is not required to be below about +700mV, the
CC
RTS
pins are left floating.
= 5.0V. This connection is shown in Figure
DD
RB
RT
are tied together, but V
for V
. To minimize noise effects and ensure
pin.
RB
RB
RT
can be anywhere between ground
to V
and 0V to (AV
RBS
RB
to provide top and bottom
RT
+ 1.0V and the analog
pin and sink sufficient
DD
RB
is tied to analog
- 1.0V) for V
RT
RB
RT
to
).