MAX11043ATL+ Maxim Integrated Products, MAX11043ATL+ Datasheet - Page 15

• Manufacturer Part Number: MAX11043ATL+
• Description: IC ADC 16BIT W/DAC 40-TQFN-EP
• Manufacturer: Maxim Integrated Products
• Type: ADC, DACr

Specifications of MAX11043ATL+

• Resolution (bits): 16 b
• Sampling Rate (per Second): 9.6M
• Data Interface: Serial
• Voltage Supply Source: Analog and Digital
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 40-TQFN Exposed Pad
• Number Of Converters: 4
• Conversion Rate: 1600 KSPs
• Resolution: 16 bit
• Interface Type: SPI
• Voltage Reference: 2.5 V
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Maximum Power Dissipation: 2963 mW
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Input Voltage: 3.3 V
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Each ADC channel features an input buffer with input
impedance of at least 5kΩ and programmable gain of
eight or 16. When set to a gain of one, the signal
bypasses the PGA to reduce noise.
The PGA features an optional 20dB/decade analog EQ
mode, with a gain of 0dB near 8kHz and attenuation
above 190kHz to reduce out-of-band noise. Using the
digital EQ filter adds another 20dB/decade of gain and
sets the 0dB frequency to 5kHz. Control the EQ and
PGA gain from their respective CONFIG_ registers. For
additional filtering and equalization, use the integrated
digital filters.
The MAX11043 features a 12-bit fine DAC with high and
low reference inputs set by the 8-bit, dual tap coarse DAC
or driven externally. The output buffer of the fine DAC has
a gain of two and can drive 10kΩ and 200pF in parallel.
Bypass the REFDACH and REFDACL with a 1µF capaci-
tor when using the coarse DAC to set the reference
values, or power down the buffers and drive REFDACH
and REFDACL with external references. Alternatively
drive one of the fine DAC references using the coarse
DAC and the other using an external reference.
The fine DAC register contains the current value of the
output. The output value changes by writing to this reg-
ister or by the rising edge of the DACSTEP input. The
DAC register updates on the next rising edge of the
system clock following the rising edge of the DACSTEP
input. The programmable DACSTEP register contains
Figure 6. EQ Filter Response to a Step Input
4-Channel, 16-Bit, Simultaneous-Sampling ADCs
-10,000
-15,000
-20,000
35,000
30,000
25,000
20,000
15,000
10,000
-5000
5000
with PGA, Filter, and 8-/12-Bit Dual-Stage DAC
0
0
______________________________________________________________________________________
20
Digital-to-Analog Converter
EQ FILTER OUTPUT
Programmable Gain Amplifier
40
SAMPLE
60
80
100
the step size. The UP/DWN input sets the direction of
the step. Drive UP/DWN high to step up, drive low to
step down.
The coarse 8-bit, dual tap DAC generates the high and
low reference values for the fine DAC. Obtain the
coarse DAC reference from the main reference or by
driving the REFDAC input externally. The main refer-
ence, REFBP, is divided by two before the coarse DAC.
When driving REFDAC, REFDACH, or REFDACL direct-
ly, ensure the voltage to the fine DAC does not exceed
AVDD/2 to prevent the output amplifier from saturating.
Figure 7. LP Filter Response to a Step Input
Figure 8. Stage 1 Default Filter Response to a Step Input
2500
2000
1500
1000
3500
3000
2500
2000
1500
1000
-500
500
500
0
0
0
0
20
10
STAGE 1 FILTER OUTPUT
LP FILTER OUTPUT
40
20
SAMPLE
SAMPLE
60
30
80
40
100
50
15