AD974BRZ Analog Devices Inc, AD974BRZ Datasheet - Page 16

• Manufacturer Part Number: AD974BRZ
• Description: IC DAS 16BIT 4CH 200KSPS 28SOIC
• Manufacturer: Analog Devices Inc
• Type: Data Acquisition System (DAS)r

Specifications of AD974BRZ

• Resolution (bits): 16 b
• Data Interface: Serial
• Sampling Rate (per Second): 200k
• Voltage Supply Source: Analog and Digital
• Voltage - Supply: 5V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Sampling Rate: 200kSPS
• Input Channel Type: Single Ended
• Supply Voltage Range - Analog: 4.75V To 5.25V
• Package: 28SOIC W
• Resolution: 16 Bit
• Number Of Adcs: 1
• Number Of Analog Inputs: 4
• Digital Interface Type: Serial (SPI)
• Input Type: Voltage
• Signal To Noise Ratio: 85(Min) dB
• Polarity Of Input Voltage: Unipolar|Bipolar
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-AD974CB - BOARD EVAL FOR AD974
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD974
AC PERFORMANCE
The AD974 is fully specified and tested for dynamic perfor-
mance specifications. The ac parameters are required for signal
processing applications such as speech recognition and spectrum
analysis. These applications require information on the ADC’s
effect on the spectral content of the input signal. Hence, the
parameters for which the AD974 is specified include S/(N+D),
THD and Spurious Free Dynamic Range. These terms are
discussed in greater detail in the following sections.
As a general rule, it is recommended that the results from sev-
eral conversions be averaged to reduce the effects of noise and
thus improve parameters such as S/(N+D) and THD. AC per-
formance can be optimized by operating the ADC at its maxi-
mum sampling rate of 200 kHz and digitally filtering the resulting
bit stream to the desired signal bandwidth. By distributing noise
over a wider frequency range the noise density in the frequency
band of interest can be reduced. For example, if the required
input bandwidth is 50 kHz, the AD974 could be oversampled
by a factor of 4. This would yield a 6 dB improvement in the
effective SNR performance.
DC PERFORMANCE
The factory calibration scheme used for the AD974 compen-
sates for bit weight errors that may exist in the capacitor array.
The mismatch in capacitor values is adjusted (using the calibra-
tion coefficients) during a conversion, resulting in excellent dc
linearity performance. Figures 17 and 18, respectively, show
typical INL and DNL plots for the AD974 at +25 C.
A histogram test is a statistical method for deriving an A/D
converter’s differential nonlinearity. A ramp input is sampled
by the ADC and a large number of conversions are taken at
each voltage level, averaged and then stored. The effect of
averaging is to reduce the transition noise by 1/n. If 64 samples
are averaged at each point, the effect of transition noise is
reduced by a factor of 8; i.e., a transition noise of 0.8 LSBs rms
is reduced to 0.1 LSBs rms. Theoretically the codes, during a
test of DNL, would all be the same size and therefore have an
equal number of occurrences. A code with an average number
of occurrences would have a DNL of “0.” A code that is
different from the average would have a DNL that was either
greater or less than zero LSB. A DNL of –1 LSB indicates that
there is a missing code present at the 16-bit level and that the
ADC exhibits 15-bit performance.
–100
–110
–125
–10
–20
–30
–40
–50
–60
–70
–80
–90
0
0
5
10
15
20
25
Figure 16. FFT Plot
30
35
FREQUENCY – kHz
40
45
50
55
60
65
5280 POINT FFT
f
f
SNRD = 86.7dB
THD = 100.7dB
SAMPLE
IN
70
= 20kHz
75
= 200kHz
80
85
90
95
100
–16–
–0.5
–1.0
–1.5
–2.0
–0.5
–1.0
–1.5
–2.0
2.0
1.5
1.0
0.5
90
80
70
60
50
40
30
20
10
2.0
1.5
1.0
0.5
0
0
1
0
0
Figure 19. S/(N+D) vs. Input Frequency
5
5
10
10
15
15
INPUT SIGNAL FREQUENCY – kHz
Figure 18. DNL Plot
Figure 17. INL Plot
20
20
10
25
25
SAMPLES – K
SAMPLES – K
30
30
100%
100%
35
35
SNR+D (dB) FOR AD974
40
40
100
45
45
50
50
55
55
60
60
1000
66
66
REV. A