CS5371-BSZR Cirrus Logic Inc, CS5371-BSZR Datasheet

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CS5371-BSZR

Manufacturer Part Number
CS5371-BSZR
Description
IC MODULATOR LP/HP 1CH 24-SSOP
Manufacturer
Cirrus Logic Inc
Type
Modulatorr
Datasheet

Specifications of CS5371-BSZR

Sampling Rate (per Second)
512k
Data Interface
Serial
Voltage Supply Source
Analog and Digital, Dual ±
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SSOP
For Use With
598-1778 - EVALUATION BOARD FOR CS5376
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Resolution (bits)
-
Features
http://www.cirrus.com
VREF+
VREF-
INR+
INF+
INR-
INF-
Fourth-order ∆Σ Architecture
Clock-jitter-tolerant Architecture
Input Voltage: 5 V
High Dynamic Range
Low Total Harmonic Distortion
Low Power Consumption
Small Footprint, 24-pin SSOP Package
Single- or Multi-channel System Support
Single or Dual Power Supply Configurations
127 dB SNR @ 215 Hz BW (2 ms Output)
124 dB SNR @ 430 Hz BW (1 ms Output)
-118 dB THD Typical, -112 dB THD Maximum
Normal Mode: 25 mW per Channel
Low-power Mode: 15 mW per Channel
1-channel System: CS5371
2-channel System: CS5372
3-channel System: CS5371 + CS5372
4-channel System: CS5372 + CS5372
VA+ = +5 V; VA- = 0 V;
VA+ = +2.5 V;VA- = -2.5 V;VD = +3.3 V
CS5371
Low-power, High-performance
VA+
VA-
∆−Σ MODULATOR
& Description
4
TH
ORDER
PWDN
pp
Fully Differential
OFST LPWR
VD = +3.3 V to +5 V
GENERATOR
CLOCK
DGND
Copyright © Cirrus Logic, Inc. 2005
VD
(All Rights Reserved)
MFLAG
MDATA
MCLK
MSYNC
Description
The CS5371 and CS5372 are one- and two-channel,
high dynamic range, fourth-order ∆Σ modulators intend-
ed for geophysical and sonar applications.
combination with the CS5376A or CS5378 digital filters,
a unique high-resolution A/D measurement system
results.
The CS5371 and CS5372 have high dynamic range
(127 dB @ 215 Hz bandwidth) and low total harmonic
distortion (typically -118 dB THD), with very low power
consumption
(LPWR=0, MCLK=2.048MHz), power consumption is
25 mW
(LPWR=1, MCLK=1.024MHz), power consumption is
15 mW per channel. Each modulator can be indepen-
dently powered down to 1 mW per channel, and by
halting the input clock, they will enter a micropower state
using only 10 µW per channel.
The modulators generate an oversampled serial bit
stream at 512 kbits per second when operated from a
clock frequency of 2.048 MHz. They are available in a
small 24-pin SSOP package, providing exceptional per-
formance in a very small footprint.
ORDERING INFORMATION
VREF+
VREF-
INR1+
INR2+
INF1+
INF2+
INR1-
INR2-
INF1-
INF2-
See
page
per
VA+
VA-
21.
∆−Σ MODULATOR
∆−Σ MODULATOR
4
4
TH
TH
channel,
∆Σ
per
ORDER
ORDER
PWDN1
PWDN2
channel.
Modulators
and
OFST LPWR
CS5371
CS5372
in
In
GENERATOR
CS5372
low-power
CLOCK
DGND
normal
VD
DS255F3
OCT ‘05
Used in
mode
mode
MFLAG1
MDATA1
MCLK
MSYNC
MFLAG2
MDATA2

Related parts for CS5371-BSZR

CS5371-BSZR Summary of contents

Page 1

... VREF- CS5371 VA- OFST LPWR http://www.cirrus.com Description The CS5371 and CS5372 are one- and two-channel, high dynamic range, fourth-order ∆Σ modulators intend- ed for geophysical and sonar applications. combination with the CS5376A or CS5378 digital filters, a unique high-resolution A/D measurement system results. ...

Page 2

... Power Supply Configurations........................................................... 14 9.2. Power Supply Bypassing ................................................................. 14 9.3. SCR Latch-up Considerations ......................................................... 15 9.4. DC-DC Converter Considerations.................................................... 15 9.5. Power Supply Rejection................................................................... 15 10. PIN DESCRIPTION - CS5371 ..................................................................... 16 11. PIN DESCRIPTION - CS5372 ..................................................................... 18 12. PACKAGE DIMENSIONS ............................................................................ 20 13. ORDERING INFORMATION ....................................................................... 21 14. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION.. 21 15. REVISION HISTORY ................................................................................... 21 ...

Page 3

... Notes: 1. Dynamic Range defined as 20 log [ (RMS full scale) / (RMS idle noise Tested with full-scale input signal of 31.25 Hz; OWR = 1000 SPS; OFST = 1. 3. Specification is for the parameter over the specified temperature range for the CS5371/72 devices only and does not include the effects of external components. ...

Page 4

... Tested with 100 mVpp sine wave applied separately to each supply. 4 (Continued) Symbol T A (Note 7) BW (Note 8) VIN (Note 8) I OVR CMRR CXT (Note 9 and 10) Analog VA Digital VD Analog VA Digital PWDN = 1 PWDN = 1, MCLK = 0 PWDN1 or PWDN2 = 1 PWDN1 = PWDN2 = 1 (Note 11) PSRR CS5371 CS5372 Min Typ Max Unit - 1720 p %F.S. (VA-) - (VA 0. ...

Page 5

... Notes:DGND = 0 V Symbol Positive Digital VD Positive Analog VA+ Negative Analog VA- (Note 14 and 15 (Note 15 OUT (Note 16) PDN All Analog Pins V (VA-) - 0.5 INA All Digital Pins V IND stg CS5371 CS5372 Min Typ Max Unit - VD V 0 ±1 ±10 µ ±10 µ ...

Page 6

... Symbol (Note 17 (Note 18) t risein t riseout (Note 18) t fallin t fallout (Note 19) t mss t msh t mfh t mdv t fallin 0 0 Figure 1. Rise and Fall Times t msh t mdv VALID DATA Figure 2. CS5372 Interface Timing CS5371 CS5372 = Min Typ Max 0.1 2.048 2 300 - - 100 - - 100 20 - ...

Page 7

... GENERAL DESCRIPTION The CS5371 and CS5372 are one- and two- chan- nel fourth-order ∆Σ modulators, optimized for ex- tremely high-resolution measurement of signals between DC and 1600 Hz. They are designed to be used with the CS5376A and CS5378 low-power digital filters. Figure 3 on page 8 shows a four- channel system connection diagram for two CS5372 and one CS5376A ...

Page 8

... INRI- PWDN2 CS5372 INR2+ MFLAG1 INF2+ 0.02 µ F MDATA1 X7R MFLAG2 INF2- MDATA2 INR2- VA- DGND 0.01 µF Figure 3. System Connection Diagram CS5371 CS5372 VD 0.01 µF 100 µF MFLAG1 MDATA1 MFLAG2 MDATA2 MCLK MSYNC GPIO4 GPIO5 GPIO6 GPIO7 CS5376A MFLAG3 MDATA3 MFLAG4 ...

Page 9

... CS5371/72 modulators and digital filter using a 31.25 Hz -24 dB input signal at a 1000 SPS output word rate. The outstanding noise characteristics of the CS5371/72 modulators are shown, with the av- eraged noise components consistently below the -150 dB level. Analysis of this data set yields a dy- namic range of 124 ...

Page 10

... MCLK cycles for the modulators to recover from an unstable condition. 5. INPUT OFFSET ) * C ] diff diff The CS5371/72 modulators are ∆Σ type and so can produce ‘idle tones’ in the passband when the CS5371 CS5372 A 2.048 MHz DS255F3 ...

Page 11

... Offset Drift Offset drift characteristics vary from part to part and with changes in the power supply voltages. If the CS5371/72 is used in precision DC measure- ment applications where offset drift mini- mized, the power supplies should be well regulated. For the lowest offset drift, the CS5371/72 modula- tors should operate with an MCLK of 2 ...

Page 12

... Gain Drift Gain drift of the CS5371/72 modulators due to tem- perature is around 5 ppm/°C, and does not include the temperature drift characteristics of the external voltage reference. Gain drift is not affected by the modulator sample rate or by power supply varia- tions ...

Page 13

... MCLK can be 0V -VREF > - (VREF + 5%) Table 1. Output coding for the CS5371/72 and digital Note that for a full-scale input signal VREF=2.5 V, the CS5371/72 and CS5376A/78 chipset does not output a maximum 24-bit 2’s com- plement digital code of 0x7FFFFF, but instead a lower scaled value to allow over-range capability. ...

Page 14

... PWDN on the CS5371 and PWDN1, PWDN2 on the CS5372. Note that when the modulators are powered down and MCLK is active, the internal clock generator is still drawing minimal currents. ...

Page 15

... SCR Latch-up Considerations The VA- pin is tied to the CS5371/72 substrate and should always be connected to the most negative supply voltage to ensure SCR latch-up does not occur. In general, latch-up may occur when any pin voltage (including the analog inputs) is 0.7V or more below VA-, or 7.6V or more above VA-. ...

Page 16

... PIN DESCRIPTION - CS5371 Rough Non-Inverting Input Fine Non-Inverting Input Fine Inverting Input Rough Inverting Input Positive Voltage Reference Input Negative Voltage Reference Input Negative Analog Power Supply Positive Analog Power Supply No Internal Connection No Internal Connection No Internal Connection No Internal Connection Power Supplies ...

Page 17

... Modulator data is output as a 1-bit serial data stream at 512 kHz with an MCLK input of 2.048 MHz. Modulator data is output at 256 kHz with an MCLK input of 1.024 MHz. _ MFLAG Modulator Flag Output, pin 22 A high level output indicates the modulator is unstable due to an over-range on the analog inputs. DS255F3 CS5371 CS5372 µ ...

Page 18

... INF2+ OFST 11 14 INR2 PWDN2 CS5371 CS5372 Ch. 1 Power-down Enable Low Power Mode Select Ch. 1 Modulator Flag Output Ch. 1 Modulator Data Output Modulator Sync Input Modulator Clock Input Positive Digital Power Supply Digital Ground Ch. 2 Modulator Data Output Ch. 2 Modulator Flag Output Offset Mode Select Ch ...

Page 19

... Modulator data is output as a 1-bit serial data stream at 512 kHz with an MCLK input of 2.048 MHz. Modulator data is output at 256 kHz with an MCLK input of 1.024 MHz. _ MFLAG1, MFLAG2 Modulator Flag, pin 22 high level output indicates the modulator is unstable due to an over-range on the analog inputs. DS255F3 CS5371 CS5372 µ ...

Page 20

... CS5371 CS5372 1 E1 END VIEW L NOTE MILLIMETERS MAX -- 2.13 0.25 1.88 0.38 2,3 8.50 1 8.20 5.60 1 0.69 1.03 0° ...

Page 21

... INFORMATION Model CS5371-BS CS5371-BSZ (lead free) CS5372-BS CS5372-BSZ (lead free) 14.ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION Model Number CS5371-BS CS5371-BSZ (lead free) CS5372-BS CS5372-BSZ (lead free) * MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020. DS255F3 Temperature -40 to +85 °C Peak Reflow Temp MSL Rating* 240 ° ...

Page 22

... AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. 22 www.cirrus.com CS5371 CS5372 Changes DS255F3 ...

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