MAX1348BETX+T Maxim Integrated Products, MAX1348BETX+T Datasheet - Page 33

• Manufacturer Part Number: MAX1348BETX+T
• Description: IC ADC/DAC 12BIT W/FIFO 36WQFN
• Manufacturer: Maxim Integrated Products
• Type: ADC, DACr

Specifications of MAX1348BETX+T

• Resolution (bits): 12 b
• Sampling Rate (per Second): 225k
• Data Interface: MICROWIRE™, QSPI™, Serial, SPI™
• Voltage Supply Source: Analog and Digital
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-WQFN Exposed Pad, 36-HWQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figures 10–13 detail the timing diagrams for writing to
the DAC and GPIOs. Figure 10 shows the timing speci-
fications for clock modes 00, 01, and 10. Figure 11
shows the timing specifications for clock mode 11.
Figure 12 details the timing specifications for the DAC
input select register and 2 bytes to follow. Output data
Figure 10. DAC/GPIO Serial-Interface Timing (Clock Modes 00, 01, and 10)
DOUT
SCLK
DIN
CS
12-Bit, Multichannel ADCs/DACs with FIFO,
t
CSPWH
______________________________________________________________________________________
t
DOE
t
t
CSS
DS
1
D15
Temperature Sensing, and GPIO Ports
t
DH
D15
2
D7
D14
t
CL
DAC/GPIO Timing
D14
D6
t
CH
3
D13
t
DOT
D13
D5
4
D12
is updated on the rising edge of SCLK in clock mode
11. Figure 13 shows the GPIO timing. Figure 14 shows
the timing details of a hardware LDAC command DAC-
register update. For a software-command DAC-register
update, t
lows the last data bit in the software command word.
D12
D4
5
D11
S
is valid from the rising edge of CS, which fol-
D1
D1
32
16
8
D0
t
CSH
D0
t
DOD
33