MCP4132-103E/SN Microchip Technology, MCP4132-103E/SN Datasheet - Page 60
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MCP4132-103E/SN
Manufacturer Part Number
MCP4132-103E/SN
Description
IC RHEO DGTL SNGL 10K SPI 8SOIC
Manufacturer
Microchip Technology
Datasheet
1.MCP4131-502EP.pdf
(88 pages)
Specifications of MCP4132-103E/SN
Taps
129
Resistance (ohms)
10K
Number Of Circuits
1
Temperature Coefficient
150 ppm/°C Typical
Memory Type
Volatile
Interface
SPI Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Resistance In Ohms
10K
End To End Resistance
10kohm
Track Taper
Linear
No. Of Steps
129
Resistance Tolerance
± 20%
Supply Voltage Range
1.8V To 5.5V
Control Interface
Serial, SPI
No. Of Pots
Single
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCP4132-103E/SN
Manufacturer:
Microchip
Quantity:
796
MCP413X/415X/423X/425X
8.2
The circuit in
TC1240A doubling charge pump. When the SHDN pin
is high, the TC1240A is off, and the level on the CS pin
is controlled by the PIC® microcontrollers (MCUs) IO2
pin.
When the SHDN pin is low, the TC1240A is on and the
V
pin to go higher than the voltage such that the PIC
MCU’s IO2 pin “clamps” at approximately V
FIGURE 8-3:
generate the V
The circuit in
MCP402X Non-volatile Digital Potentiometer Evalua-
tion Board (Part Number: MCP402XEV). This method
requires that the system voltage be approximately 5V.
This ensures that when the PIC10F206 enters a
brown-out condition, there is an insufficient voltage
level on the CS pin to change the stored value of the
wiper.
Potentiometer
(DS51546) contains a complete schematic.
GP0 is a general purpose I/O pin, while GP2 can either
be a general purpose I/O pin or it can output the internal
clock.
For the serial commands, configure the GP2 pin as an
input (high-impedance). The output state of the GP0
pin will determine the voltage on the CS pin (V
For high-voltage serial commands, force the GP0
output pin to output a high level (V
GP2 pin to output the internal clock. This will form a
charge pump and increase the voltage on the CS pin
(when the system voltage is approximately 5V).
DS22060B-page 60
OUT
PIC MCU
voltage is 2 * V
Techniques to force the CS pin to
V
IO1
IO2
The
IHH
Figure 8-4
Figure 8-3
IHH
Evaluation
MCP402X
voltage.
DD
R
Using the TC1240A to
. The resistor R
1
shows the method used on the
SHDN
V
TC1240A
IN
shows a method using the
V
OUT
Board
Non-volatile
C
OH
C+
2
C-
) and configure the
CS
1
User’s
allows the CS
MCP402X
DD
IL
.
C
or V
1
Digital
Guide
IH
).
FIGURE 8-4:
Digital Potentiometer Evaluation Board
(MCP402XEV) implementation to generate the
V
8.3
Figure 8-5
the
Disconnecting the wiper allows the transistor input to
be taken to the Bias voltage level (disconnecting A and
or B may be desired to reduce system current).
Disconnecting Terminal A modifies the transistor input
by the R
Disconnecting Terminal B modifies the transistor input
by the R
Common A and Common B connections could be
connected to V
FIGURE 8-5:
using Terminal Disconnects.
IHH
Input
PIC10F206
Input
voltage.
independent
Using Shutdown Modes
AW
GP0
GP2
BW
shows a possible application circuit where
Balance
rheostat value to the Common A. The
DD
rheostat value to the Common B.
B
A
C
and V
Common A
1
Common B
terminals
MCP4XXX Non-Volatile
Example Application Circuit
© 2008 Microchip Technology Inc.
SS
W
.
R
Bias
1
could
To base
of Transistor
(or Amplifier)
C
2
CS
MCP4XXX
be
used.