MCP4341-502E/ST Microchip Technology, MCP4341-502E/ST Datasheet - Page 43
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MCP4341-502E/ST
Manufacturer Part Number
MCP4341-502E/ST
Description
IC DGTL POT QUAD 5K 20TSSOP
Manufacturer
Microchip Technology
Series
WiperLock™r
Datasheet
1.MCP4361-503EML.pdf
(80 pages)
Specifications of MCP4341-502E/ST
Package / Case
20-TSSOP
Taps
129
Resistance (ohms)
5K
Number Of Circuits
4
Temperature Coefficient
150 ppm/°C Typical
Memory Type
Non-Volatile
Interface
SPI Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Resistance In Ohms
5K
Number Of Pots
Quad
Taps Per Pot
129
Resistance
5 KOhms
Wiper Memory
Non Volatile
Buffered Wiper
Buffered
Digital Interface
SPI
Operating Supply Voltage
2.7 V to 5.5 V
Supply Current
450 uA
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCP4341-502E/ST
Manufacturer:
Microchip
Quantity:
329
6.0
The MCP43XX devices support the SPI serial protocol.
This SPI operates in the slave mode (does not
generate the serial clock).
The SPI interface uses up to four pins. These are:
• CS - Chip Select
• SCK - Serial Clock
• SDI - Serial Data In
• SDO - Serial Data Out
FIGURE 6-1:
© 2009 Microchip Technology Inc.
Note 1: If High voltage commands are desired, some type of external circuitry needs to be implemented.
SERIAL INTERFACE (SPI)
Typical SPI Interface Connections
Controller
Typical SPI Interface Block Diagram.
Host
I/O
SDO
SDI
SCK
(1)
(Master Out - Slave In (MOSI))
(Master In - Slave Out (MISO))
Typical SPI Interface is shown in
interface, the Master’s Output pin is connected to the
Slave’s Input pin and the Master’s Input pin is
connected to the Slave’s Output pin.
The MCP4XXX SPI’s module supports two (of the four)
standard SPI modes. These are Mode 0,0 and 1,1.
The SPI mode is determined by the state of the SCK
pin (V
inactive (V
All SPI interface signals are high-voltage tolerant.
IH
or V
IH
IL
) to active (V
) on the when the CS pin transitions from
MCP434X/436X
IL
or V
SDI
SCK
SDO
CS
MCP4XXX
IHH
Figure
).
DS22233A-page 43
6-1. In the SPI