AD5300BRMZ Analog Devices Inc, AD5300BRMZ Datasheet

IC DAC 8BIT R-R 2.7-5.5V 8-MSOP

AD5300BRMZ

Manufacturer Part Number
AD5300BRMZ
Description
IC DAC 8BIT R-R 2.7-5.5V 8-MSOP
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD5300BRMZ

Data Interface
Serial
Settling Time
4µs
Number Of Bits
8
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
1.4mW
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Resolution (bits)
8bit
Sampling Rate
250kSPS
Input Channel Type
Serial
Supply Voltage Range - Analog
2.7V To 5.5V
Supply Current
140µA
Digital Ic Case Style
SOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD5300BRMZ
Manufacturer:
ADI
Quantity:
419
FEATURES
Single 8-Bit DAC
6-Lead SOT-23 and 8-Lead MSOP Packages
Micropower Operation: 140 μA @ 5 V
Power-Down to 200 nA @ 5 V, 50 nA @ 3 V
2.7 V to 5.5 V Power Supply
Guaranteed Monotonic by Design
Reference Derived from Power Supply
Power-On Reset to 0 V
3 Power-Down Functions
Low Power Serial Interface with Schmitt-Triggered Inputs
On-Chip Output Buffer Amplifier, Rail-to-Rail Operation
SYNC Interrupt Facility
Qualified for automotive applications
APPLICATIONS
Portable Battery-Powered Instruments
Digital Gain and Offset Adjustment
Programmable Voltage and Current Sources
Programmable Attenuators
GENERAL DESCRIPTION
The
operates from a single 2.7 V to 5.5 V supply, consuming 115 μA
at 3 V. Its on-chip precision output amplifier allows rail-to-rail
output swing to be achieved. The AD5300 uses a versatile 3-wire
serial interface that operates at clock rates up to 30 MHz and is
compatible with standard SPI®, QSPI™, MICROWIRE™, and
DSP interface standards.
The reference for the AD5300
inputs and thus gives the widest dynamic output range. The part
incorporates a power-on reset circuit that ensures that the DAC
output powers up to 0 V and remains there until a valid write takes
place to the device. The part contains a power-down feature that
reduces the current consumption of the device to 200 nA at 5 V
and provides software selectable output loads while in power-
down mode. The part is put into power-down mode over the
serial interface.
The low power consumption of this part in normal operation
makes it ideally suited to portable battery-operated equipment.
The power consumption is 0.7 mW at 5 V, reducing to 1 μW in
power-down mode.
The AD5300 is one of a family of pin-compatible DACs. The
AD5310
version. The AD5300/AD5310/AD5320 are available in 6-lead
SOT-23 packages and 8-lead MSOP packages.
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
AD5300
is the 10-bit version, and the
is a single, 8-bit buffered voltage output DAC that
1
is derived from the power supply
AD5320
is the 12-bit
2.7 V to 5.5 V, 140 μA, Rail-to-Rail Output
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
6.
1
SYNC SCLK DIN
Patent pending; protected by U.S. Patent No. 5684481.
POWER-ON
REGISTER
CONTROL
Available in 6-lead SOT-23 and 8-lead MSOP packages.
Low power, single-supply operation. This part operates from a
single 2.7 V to 5.5 V supply and typically consumes 0.35 mW
at 3 V and 0.7 mW at 5 V, making it ideal for battery-powered
applications.
The on-chip output buffer amplifier allows the output of
the DAC to swing rail-to-rail with a slew rate of 1 V/μs.
Reference derived from the power supply.
High speed serial interface with clock speeds up to 30 MHz.
Designed for very low power consumption. The interface
powers up only during a write cycle.
Power-down capability. When powered down, the DAC
typically consumes 50 nA at 3 V and 200 nA at 5 V.
RESET
LOGIC
INPUT
DAC
FUNCTIONAL BLOCK DIAGRAM
REF (+) REF (–)
8-Bit DAC in a SOT-23
©2003–2010 Analog Devices, Inc. All rights reserved.
V
DD
8-BIT
DAC
CONTROL LOGIC
GND
POWER-DOWN
OUTPUT
BUFFER
AD5300
RESISTOR
NETWORK
AD5300
www.analog.com
V
OUT

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AD5300BRMZ Summary of contents

Page 1

FEATURES Single 8-Bit DAC 6-Lead SOT-23 and 8-Lead MSOP Packages Micropower Operation: 140 μ Power-Down to 200 2 5.5 V Power Supply Guaranteed Monotonic by Design ...

Page 2

AD5300–SPECIFICATIONS Parameter 2 STATIC PERFORMANCE Resolution Relative Accuracy Differential Nonlinearity Zero-Code Error Full-Scale Error Gain Error Zero-Code Error Drift Gain Temperature Coefficient 3 OUTPUT CHARACTERISTICS Output Voltage Range Output Voltage Settling Time Slew Rate Capacitive Load Stability Digital-to-Analog Glitch Impulse ...

Page 3

TIMING CHARACTERISTICS Limit at T Parameter NOTES ...

Page 4

AD5300 V OUT GND V SOT-23 MSOP Pin No. Pin No. Mnemonic Function Analog Output Voltage from DAC. The output amplifier has rail-to-rail operation. OUT 2 8 GND Ground Reference Point for All Circuitry on the Part. ...

Page 5

TERMINOLOGY Relative Accuracy For the DAC, relative accuracy or integral nonlinearity (INL measure of the maximum deviation, in LSBs, from a straight line passing through the endpoints of the DAC transfer function. A typical INL vs. code plot ...

Page 6

AD5300–Typical Performance Characteristics 1 INL @ 3V 0.5 INL @ 5V 0 –0.5 –1 100 150 200 250 CODE Figure 2. Typical INL Plot 1 0.5 MAX INL MAX ...

Page 7

250 200 150 100 50 0 – TEMPERATURE – C Figure 11. Supply Current vs. Temperature 800 600 400 200 ...

Page 8

AD5300 GENERAL DESCRIPTION D/A Section The AD5300 DAC is fabricated on a CMOS process. The archi- tecture consists of a string DAC followed by an output buffer amplifier. Since there is no reference input pin, the power supply (V ) ...

Page 9

SCLK SYNC DB15 DIN INVALID WRITE SEQUENCE: TH SYNC HIGH BEFORE 16 FALLING EDGE SYNC Interrupt In a normal write sequence, the SYNC line is kept low for at least 16 falling edges of SCLK and the DAC is updated ...

Page 10

AD5300 AD5300 to 68HC11/68L11 Interface Figure 26 shows a serial interface between the AD5300 and the 68HC11/68L11 microcontroller. SCK of the 68HC11/68L11 drives the SCLK of the AD5300, while the MOSI output drives the serial data line of the DAC. ...

Page 11

R1 = 10k V V OUT 0.1 F AD5300 3-WIRE SERIAL INTERFACE Figure 30. Bipolar Operation with the AD5300 Two 8-Bit AD5300s Together Make One 15-Bit DAC By using the configuration in Figure 31, it can ...

Page 12

AD5300 OUTLINE DIMENSIONS 1.70 1.60 1.50 PIN 1 INDICATOR 1.30 1.15 0.90 0.15 MAX 0.05 MIN IDENTIFIER 3.00 2.90 2. 3.00 2.80 2. 0.95 BSC 1.90 BSC 0.20 MAX 1.45 MAX 0.08 MIN 0.95 ...

Page 13

... Model Temperature Range AD5300BRM −40°C to +105°C AD5300BRMZ −40°C to +105°C AD5300BRMZ-REEL −40°C to +105°C AD5300BRMZ-REEL7 −40°C to +105°C AD5300BRT-500RL7 −40°C to +105°C AD5300BRT-REEL −40°C to +105°C AD5300BRT-REEL7 −40°C to +105°C AD5300BRTZ-500RL7 −40°C to +105°C AD5300BRTZ-REEL − ...

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