CS4365-CQZ Cirrus Logic Inc, CS4365-CQZ Datasheet - Page 27
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CS4365-CQZ
Manufacturer Part Number
CS4365-CQZ
Description
IC DAC 6CH 114DB 192KHZ 48LQFP
Manufacturer
Cirrus Logic Inc
Datasheet
1.CS4365-CQZ.pdf
(52 pages)
Specifications of CS4365-CQZ
Package / Case
48-LQFP
Number Of Bits
24
Data Interface
Serial
Number Of Converters
6
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
390mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Conversion Rate
216 KSPS
Resolution
24 bit
Interface Type
Serial
Operating Supply Voltage
5 V
Operating Temperature Range
+ 85 C
Maximum Power Dissipation
390 mW
Mounting Style
SMD/SMT
Number Of Dac Outputs
6
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1779 - EVALUATION BOARD FOR CS4365
Settling Time
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1060
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CS4365-CQZ
Manufacturer:
NS
Quantity:
301
Company:
Part Number:
CS4365-CQZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
DS670F2
4.9
4.9.1
Grounding and Power Supply Arrangements
As with any high-resolution converter, the CS4365 requires careful attention to power supply and grounding
arrangements if its potential performance is to be realized. The Typical Connection Diagram shows the rec-
ommended power arrangements, with VA, VD, VLC, and VLS connected to clean supplies. If the ground
planes are split between digital ground and analog ground, the GND pins of the CS4365 should be connect-
ed to the analog ground plane.
All signals, especially clocks, should be kept away from the FILT+ and VQ pins in order to avoid unwanted
coupling into the DAC.
(64Fs)
BCKA
DSD Normal Mode
Capacitor Placement
Decoupling capacitors should be placed as close to the DAC as possible, with the low value ceramic ca-
pacitor being the closest. To further minimize impedance, these capacitors should be located on the same
layer as the DAC. If desired, all supply pins with similar voltage ratings may be connected to the same
supply, but a decoupling capacitor should still be placed on each supply pin.
Notes: All decoupling capacitors should be referenced to ground.
The CDB4365 evaluation board demonstrates the optimum layout and power supply arrangements.
DSD_SCLK
Not Used
Not Used
DSDAx,
DSDBx
Figure 18. DSD Phase Modulation Mode Diagram
D0
D0
D1
D1
D1
D2
D2
DSDAx,
DSD_SCLK
DSD_SCLK
DSDBx
Not Used
Modulation Mode
DSD Phase
CS4365
(64Fs)
BCKD
(128Fs)
BCKA
27