AD5625BRUZ Analog Devices Inc, AD5625BRUZ Datasheet

IC DAC NANO 12BIT QUAD 14-TSSOP

AD5625BRUZ

Manufacturer Part Number
AD5625BRUZ
Description
IC DAC NANO 12BIT QUAD 14-TSSOP
Manufacturer
Analog Devices Inc
Series
nanoDAC™r
Datasheets

Specifications of AD5625BRUZ

Data Interface
I²C, Serial
Settling Time
3µs
Number Of Bits
12
Number Of Converters
4
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Resolution (bits)
12bit
Sampling Rate
333kSPS
Input Channel Type
Serial
Supply Voltage Range - Analogue
2.7V To 5.5V
Supply Current
1.9mA
Digital Ic Case Style
TSSOP
No.
RoHS Compliant
Number Of Channels
4
Resolution
12b
Conversion Rate
333KSPS
Interface Type
Serial (2-Wire/I2C)
Single Supply Voltage (typ)
3.3/5V
Dual Supply Voltage (typ)
Not RequiredV
Architecture
Resistor-String
Power Supply Requirement
Single
Output Type
Voltage
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
14
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
Lead Free Status / Rohs Status
Compliant
FEATURES
Low power, smallest pin-compatible, quad nanoDACs
AD5625R/AD5645R/AD5665R
AD5625/AD5665
3 mm × 3 mm 10-lead LFCSP and 14-lead TSSOP
2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on reset to zero scale/midscale
Per channel power-down
Hardware LDAC and CLR functions
I
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
GENERAL DESCRIPTION
The AD5625R/AD5645R/AD5665R and AD5625/AD5665
members of the nanoDAC® family are low power, quad, 12-/
14-/16-bit, buffered voltage-out DACs with/without an on-chip
reference. All devices operate from a single 2.7 V to 5.5 V supply,
are guaranteed monotonic by design, and have an I
serial interface.
The AD5625R/AD5645R/AD5665R have an on-chip reference.
The LFCSP versions of the AD56x5R have a 1.25 V or 2.5 V,
10 ppm/°C reference, giving a full-scale output range of 2.5 V or
5 V; the TSSOP versions of the AD56x5R have a 2.5 V, 5 ppm/°C
reference, giving a full-scale output range of 5 V. The on-chip
reference is off at power-up, allowing the use of an external
reference. The internal reference is enabled via a software write.
The AD5625/AD5665 require an external reference voltage to
set the output range of the DAC.
The part incorporates a power-on reset circuit that ensures that
the DAC output powers up to 0 V (POR = GND) or midscale
(POR = V
on-chip precision output amplifier enables rail-to-rail output swing.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
2
C-compatible serial interface supports standard (100 kHz),
fast (400 kHz), and high speed (3.4 MHz) modes
12-/14-/16-bit nanoDACs
On-chip, 2.5 V, 5 ppm/°C reference in TSSOP
On-chip, 2.5 V, 10 ppm/°C reference in LFCSP
On-chip, 1.25 V, 10 ppm/°C reference in LFCSP
12-/16-bit nanoDACs
External reference only
DD
) and remains there until a valid write occurs. The
AD5625R/AD5645R/AD5665R, AD5625/AD5665
2
C-compatible
5 ppm/°C On-Chip Reference, I
Quad, 12-/14-/16-Bit nanoDACs with
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
ADDR1
ADDR2
NOTES
1. THE FOLLOWING PINS ARE AVAILABLE ONLY ON 14-LEAD PACKAGE:
The AD56x5R/AD56x5 use a 2-wire I
interface that operates in standard (100 kHz), fast (400 kHz),
and high speed (3.4 MHz) modes.
Table 1. Related Devices
Part No.
AD5025/AD5045/AD5065
AD5624R/AD5644R/AD5664R,
AD5624/AD5664
AD5627R/AD5647R/AD5667R,
AD5627/AD5667
AD5666
ADDR1
ADDR2
NOTES
1. THE FOLLOWING PINS ARE AVAILABLE ONLY ON 14-LEAD PACKAGE:
ADDR2, LDAC, CLR, POR.
SDA
ADDR2, LDAC, CLR, POR.
SCL
SDA
SCL
AD5625R/AD5645R/AD5665R
LDAC CLR
LDAC CLR
FUNCTIONAL BLOCK DIAGRAMS
AD5625/AD5665
Figure 1. AD5625R/AD5645R/AD5665R
V
POWER-ON RESET
V
POWER-ON RESET
©2007-2009 Analog Devices, Inc. All rights reserved.
DD
DD
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
Figure 2. AD5625/AD5665
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
POR
POR
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
GND
GND
DAC
DAC
DAC
DAC
DAC
DAC
DAC
DAC
Description
Dual 12-/14-/16-bit DACs
Quad SPI 12-/14-/16-bit DACs,
with/without internal reference
Dual I
with/without internal reference
Quad SPI 16-bit DAC with
internal reference
2
V
POWER-DOWN LOGIC
POWER-DOWN LOGIC
C-compatible serial
2
REFIN
C 12-/14-/16-bit DACs,
2
STRING
STRING
STRING
STRING
STRING
STRING
STRING
STRING
DAC A
DAC B
DAC C
DAC D
V
DAC A
DAC B
DAC C
DAC D
C Interface
REFIN
/V
REFOUT
1.25V/2.5V REF
BUFFER
BUFFER
BUFFER
BUFFER
www.analog.com
BUFFER
BUFFER
BUFFER
BUFFER
V
V
V
V
V
V
V
V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
A
B
C
D
A
B
C
D

Related parts for AD5625BRUZ

AD5625BRUZ Summary of contents

Page 1

FEATURES Low power, smallest pin-compatible, quad nanoDACs AD5625R/AD5645R/AD5665R 12-/14-/16-bit nanoDACs On-chip, 2 ppm/°C reference in TSSOP On-chip, 2 ppm/°C reference in LFCSP On-chip, 1. ppm/°C reference in LFCSP AD5625/AD5665 12-/16-bit nanoDACs External reference only ...

Page 2

AD5625R/AD5645R/AD5665R, AD5625/AD5665 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagrams ............................................................. 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Specifications—AD5665R/AD5645R/AD5625R ..................... 3 Specifications—AD5665/AD5625 ............................................. 5 AC Characteristics ........................................................................ ...

Page 3

SPECIFICATIONS SPECIFICATIONS—AD5665R/AD5645R/AD5625R kΩ to GND Table 2. Parameter Min 2 STATIC PERFORMANCE AD5665R Resolution Relative Accuracy Differential Nonlinearity AD5645R Resolution Relative Accuracy Differential Nonlinearity AD5625R Resolution 12 ...

Page 4

AD5625R/AD5645R/AD5665R, AD5625/AD5665 Parameter Min REFERENCE OUTPUT (2.5 V) Output Voltage 2.495 3 Reference TC Output Impedance LOGIC INPUTS (ADDRx, CLR, 3 LDAC, POR Input Current Input Low Voltage INL V , Input High Voltage 0.85 ...

Page 5

SPECIFICATIONS—AD5665/AD5625 kΩ to GND Table 3. Parameter STATIC PERFORMANCE 2 AD5665 Resolution Relative Accuracy Differential Nonlinearity AD5625 Resolution Relative Accuracy Differential Nonlinearity Zero-Code Error Offset Error Full-Scale ...

Page 6

AD5625R/AD5645R/AD5665R, AD5625/AD5665 Parameter 3 LOGIC OUTPUTS (SDA Output Low Voltage OL Floating-State Leakage Current Floating-State Output Capacitance POWER REQUIREMENTS (Normal Mode 4 5 2.7 V ...

Page 7

AC CHARACTERISTICS kΩ to GND Table 4. 1,2 Parameter Output Voltage Settling Time AD5625R/AD5625 AD5645R AD5665R/AD5665 Slew Rate Digital-to-Analog Glitch Impulse Digital Feedthrough Reference Feedthrough Digital Crosstalk ...

Page 8

AD5625R/AD5645R/AD5665R, AD5625/AD5665 TIMING SPECIFICATIONS 5.5 V; all specifications T DD Table 5. 2 Parameter Test Conditions 3 f Standard mode SCL Fast mode High speed mode 100 pF B High ...

Page 9

Parameter Test Conditions t Standard mode 12 Fast mode High speed mode 100 pF B High speed mode 400 Standard mode 13 Fast mode High speed mode t Standard mode 14 Fast ...

Page 10

AD5625R/AD5645R/AD5665R, AD5625/AD5665 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 6. Parameter V to GND GND OUT GND REFIN REFOUT Digital Input Voltage to GND Operating Temperature Range, Industrial Storage Temperature ...

Page 11

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS LDAC 1 ADDR1 2 AD5625R AD5645R/ DD AD5665R OUT TOP VIEW OUT (Not to Scale) POR REFIN REFOUT Figure 4. Pin Configuration (14-Lead ...

Page 12

AD5625R/AD5645R/AD5665R, AD5625/AD5665 TYPICAL PERFORMANCE CHARACTERISTICS REF T = 25° –2 –4 –6 –8 – 10k 15k 20k 25k 30k 35k 40k 45k 50k 55k 60k ...

Page 13

2.5V REFOUT T = 25° –2 –4 –6 –8 –10 CODE Figure 14. INL, AD5665R, 2.5 V Internal Reference 2.5V ...

Page 14

AD5625R/AD5645R/AD5665R, AD5625/AD5665 1.25V REFOUT T = 25° –2 –4 –6 –8 –10 CODE Figure 20. INL, AD5665R,1.25 V Internal Reference ...

Page 15

REF 4 2 MAX DNL 0 –2 –4 –6 –8 –40 – TEMPERATURE (°C) Figure 26. INL Error and DNL Error vs. Temperature ...

Page 16

AD5625R/AD5645R/AD5665R, AD5625/AD5665 1 25°C A 0.5 ZERO-SCALE ERROR 0 –0.5 –1.0 –1.5 –2.0 –2.5 2.7 3.2 3.7 4.2 V (V) DD Figure 32. Zero-Scale Error and Offset Error vs. Supply 5.5V DD ...

Page 17

DAC LOADED WITH DAC LOADED WITH 0.4 FULL-SCALE ZERO-SCALE SOURCING CURRENT SINKING CURRENT 0 1.25V REFOUT 0 –0.1 –0 –0 2.5V REFOUT –0.4 –0.5 –10 ...

Page 18

AD5625R/AD5645R/AD5665R, AD5625/AD5665 2.538 REF 2.537 T = 25°C A 2.536 5ns/SAMPLE NUMBER 2.535 GLITCH IMPULSE = 9.494nV 2.534 1LSB CHANGE AROUND MIDSCALE (0x8000 TO 0x7FFF) 2.533 2.532 2.531 2.530 2.529 2.528 2.527 2.526 2.525 2.524 2.523 ...

Page 19

T = 25°C A MIDSCALE LOADED 700 600 500 400 300 2.5V REFOUT 200 100 1.25V REFOUT 0 100 1k 10k 100k FREQUENCY (Hz) Figure 50. Noise ...

Page 20

AD5625R/AD5645R/AD5665R, AD5625/AD5665 TERMINOLOGY Relative Accuracy or Integral Nonlinearity (INL) For the DAC, relative accuracy or integral nonlinearity is a measurement of the maximum deviation, in LSBs, from a straight line passing through the endpoints of the DAC transfer function. Differential ...

Page 21

Analog Crosstalk Analog crosstalk is the glitch impulse transferred to the output of one DAC due to a change in the output of another DAC measured by loading one of the input registers with a full-scale code change ...

Page 22

AD5625R/AD5645R/AD5665R, AD5625/AD5665 THEORY OF OPERATION DIGITAL-TO-ANALOG CONVERTER (DAC) The AD56x5R/AD56x5 DACs are fabricated on a CMOS process. The AD56x5 does not have an internal reference, and the DAC architecture is shown in Figure 54. The AD56x5R does have an internal ...

Page 23

EXTERNAL REFERENCE The V pin on the AD56x5R allows the use of an external REFIN reference if the application requires it. The default condition of the on-chip reference is off at power-up. All devices can be operated from a single ...

Page 24

AD5625R/AD5645R/AD5665R, AD5625/AD5665 1 SCL SDA START BY MASTER FRAME 1 SLAVE ADDRESS 1 SCL (CONTINUED) SDA DB15 DB14 DB13 DB12 (CONTINUED) 1 SCL SDA START BY MASTER FRAME 1 SLAVE ADDRESS 1 ...

Page 25

SCL SDA START BY MASTER FRAME 1 SLAVE ADDRESS 1 SCL (CONTINUED) SDA DB15 DB14 DB13 DB12 (CONTINUED) FAST MODE 1 SCL SDA START BY MASTER HS-MODE MASTER CODE Figure 61. ...

Page 26

AD5625R/AD5645R/AD5665R, AD5625/AD5665 BLOCK SLAVE COMMAND MOST SIGNIFICANT LEAST SIGNIFICANT ADDRESS BYTE DATA BYTE DATA BYTE Figure 62. Multiple Block Write with Command Byte in Each Block ( BLOCK SLAVE COMMAND ...

Page 27

BROADCAST MODE Broadcast addressing is supported on the AD56x5R/AD56x5 in write mode only. Broadcast addressing can be used to synchro- nously update or power down multiple AD56x5R/AD56x5 devices. When the broadcast address is used, the AD56x5R/ AD56x5 responds regardless of ...

Page 28

AD5625R/AD5645R/AD5665R, AD5625/AD5665 Synchronous LDAC The DAC registers are updated after new data is read in. LDAC can be permanently low or pulsed. Asynchronous LDAC The outputs are not updated at the same time that the input registers are written to. ...

Page 29

POWER-DOWN MODES Command 100 is reserved for the power-up/power-down function. The power-up/power-down modes are programmed by setting Bit DB5 and Bit DB4. This defines the output state of the DAC amplifier, as shown in Table 14. Bit DB3 to Bit ...

Page 30

AD5625R/AD5645R/AD5665R, AD5625/AD5665 POWER-ON RESET AND SOFTWARE RESET The AD56x5R/AD56x5 contain a power-on reset circuit that controls the output voltage during power-up. The 10-lead version of the device powers The 14-lead version has a power-on reset (POR) ...

Page 31

APPLICATIONS INFORMATION USING A REFERENCE AS A POWER SUPPLY FOR THE AD56x5R/AD56x5 Because the supply current required by the AD56x5R/AD56x5 is extremely low, an alternative option is to use a voltage reference to supply the required voltage to the part ...

Page 32

AD5625R/AD5645R/AD5665R, AD5625/AD5665 OUTLINE DIMENSIONS PIN 1 INDEX AREA 0.80 0.75 0.70 SEATING PLANE 4.50 4.40 4.30 PIN 1 1.05 1.00 0.80 0.15 0.05 COPLANARITY 0.10 0.30 3.00 0.23 BSC SQ 0. EXPOSED (BOTTOM VIEW) 0.50 0.40 5 0.30 ...

Page 33

... Model Range AD5625BCPZ-R2 −40°C to +105°C AD5625BCPZ-REEL7 −40°C to +105°C AD5625BRUZ −40°C to +105°C AD5625BRUZ-REEL7 −40°C to +105°C AD5625RBCPZ-R2 −40°C to +105°C AD5625RBCPZ-REEL7 −40°C to +105°C AD5625RACPZ-REEL7 −40°C to +105°C AD5625RACPZ-1RL7 −40°C to +105°C AD5625RBRUZ-1 − ...

Page 34

AD5625R/AD5645R/AD5665R, AD5625/AD5665 NOTES Rev Page ...

Page 35

NOTES AD5625R/AD5645R/AD5665R, AD5625/AD5665 Rev Page ...

Page 36

AD5625R/AD5645R/AD5665R, AD5625/AD5665 NOTES refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). ©2007-2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06341-0-12/09(B) Rev. B ...

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