AD9772AASTZ Analog Devices Inc, AD9772AASTZ Datasheet - Page 2

• Manufacturer Part Number: AD9772AASTZ
• Description: IC DAC 14BIT 160MSPS 48-LQFP
• Manufacturer: Analog Devices Inc
• Series: TxDAC+®r

Specifications of AD9772AASTZ

• Data Interface: Parallel
• Settling Time: 11ns
• Number Of Bits: 14
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 272mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Resolution (bits): 14bit
• Sampling Rate: 160MSPS
• Input Channel Type: Parallel
• Supply Voltage Range - Analog: 3.1V To 3.5V
• Supply Current: 37mA
• Digital Ic Case Style: QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9772A-EB - BOARD EVAL FOR AD9772A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD9772A
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Product Highlights ........................................................................... 3
Specifications..................................................................................... 4
Absolute Maximum Ratings............................................................ 9
Pin Configuration and Function Descriptions........................... 10
Terminology .................................................................................... 12
Typical Performance Characteristics ........................................... 14
Theory of Operation ...................................................................... 17
REVISION HISTORY
2/08—Rev. B to Rev. C
Changes to DVDD Parameter......................................................... 4
Changes to PLL Clock Enabled Parameter ................................... 7
Changes to PLL Clock Disabled Parameter .................................. 7
Changes to Table 8.......................................................................... 10
Changes to Functional Description ............................................. 17
Change to Power Dissipation Section.......................................... 25
Changes to Power and Grounding Considerations Section ..... 27
Change to Figure 53 ....................................................................... 29
Change to Direct IF Section.......................................................... 30
Changes to Figure 61...................................................................... 34
Updated Outline Dimensions ....................................................... 38
Changes to Ordering Guide .......................................................... 38
6/03—Rev. A to Rev. B
Change to Features .......................................................................... 1
Change to DC Specifications .......................................................... 2
DC Specifications ......................................................................... 4
Dynamic Specifications ............................................................... 6
Digital Specifications ................................................................... 7
Digital Filter Specifications ......................................................... 8
Thermal Characteristics .............................................................. 9
ESD Caution.................................................................................. 9
Functional Description.............................................................. 17
Digital Modes of Operation ...................................................... 17
PLL Clock Multiplier Operation .............................................. 19
Synchronization of Clock/Data
Using Reset with PLL Disabled................................................. 21
DAC Operation........................................................................... 22
Rev. C | Page 2 of 40
Applying the AD9772A ................................................................. 26
Applications Information .............................................................. 29
AD9772A Evaluation Board ......................................................... 32
Outline Dimensions ....................................................................... 38
Change to Digital Filter Specifications ...........................................5
Ordering Guide Updated .................................................................6
Change to Pin Function Descriptions ............................................7
Change to Figure 13a and Figure 13b.......................................... 15
Change to Digital Inputs/Outputs................................................ 18
Change to Sleep Mode Operation ................................................ 19
Change to Figure 22 ....................................................................... 19
Change to Figure 23 ....................................................................... 19
Change to Power and Ground Considerations .......................... 21
Change to Figure 29 ....................................................................... 21
Update to Outline Dimensions..................................................... 30
3/02—Rev. 0 to Rev. A
Edits to Digital Specifications..........................................................4
Edits to Absolute Maximum Ratings ..............................................6
Change to TPC 11 .......................................................................... 10
Change to Figure 9 Caption .......................................................... 14
Change to Figure 13a and Figure 13b.......................................... 15
DAC Transfer Function ............................................................. 22
Reference Operation .................................................................. 22
Reference Control Amplifier .................................................... 23
Analog Outputs .......................................................................... 23
Digital Inputs/Outputs .............................................................. 24
Sleep Mode Operation............................................................... 25
Power Dissipation....................................................................... 25
Output Configurations .............................................................. 26
Differential Coupling Using a Transformer ............................... 26
Differential Coupling Using an Op Amp................................ 26
Single-Ended, Unbuffered Voltage Output............................. 26
Single-Ended, Buffered Voltage Output.................................. 27
Power and Grounding Considerations.................................... 27
Multicarrier ................................................................................. 29
Baseband Single-Carrier Applications .................................... 30
Direct IF....................................................................................... 30
Schematics................................................................................... 33
Evaluation Board Layout........................................................... 35
Ordering Guide .......................................................................... 38