HI5731BIB Intersil, HI5731BIB Datasheet - Page 4

IC DAC 12-BIT 100MSPS 28-SOIC

HI5731BIB

Manufacturer Part Number
HI5731BIB
Description
IC DAC 12-BIT 100MSPS 28-SOIC
Manufacturer
Intersil
Datasheet

Specifications of HI5731BIB

Settling Time
20ns
Number Of Bits
12
Data Interface
Parallel
Number Of Converters
1
Voltage Supply Source
Analog and Digital, Dual ±
Power Dissipation (max)
650mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Electrical Specifications
NOTES:
Spurious Free Dynamic Range to Nyquist
(Note 3)
REFERENCE/CONTROL AMPLIFIER
Internal Reference Voltage, V
Internal Reference Voltage Drift
Internal Reference Output Current Sink/Source
Capability
Internal Reference Load Regulation
Input Impedance at REF OUT pin
Amplifier Large Signal Bandwidth (0.6V
Amplifier Small Signal Bandwidth (0.1V
Reference Input Impedance
Reference Input Multiplying Bandwidth (CTL IN)
DIGITAL INPUTS (D9-D0, CLK, INVERT)
Input Logic High Voltage, V
Input Logic Low Voltage, V
Input Logic Current, I
Input Logic Current, I
Digital Input Capacitance, C
TIMING CHARACTERISTICS
Data Setup Time, t
Data Hold Time, t
Propagation Delay Time, t
CLK Pulse Width, t
POWER SUPPLY CHARACTERISTICS
I
I
I
Power Dissipation
Power Supply Rejection Ratio
2. Gain Error measured as the error in the ratio between the full scale output current and the current through R
3. Parameter guaranteed by design or characterization and not production tested.
4. All devices are 100% tested at 25
5. Dynamic Range must be limited to a 1V swing within the compliance range.
EEA
EED
CCD
ratio should be 16.
HLD
PARAMETER
SU
PW1
IH
IL
, t
PW2
PD
IL
IH
IN
REF
4
AV
T
A
o
EE
= 25
C.
P-P
P-P
, DV
o
)
)
C for All Typical Values (Continued)
EE
= -4.94 to -5.46V, V
f
f
f
(Note 4)
(Note 3)
(Note 3)
I
(Note 3)
Sine Wave Input, to Slew Rate Limited (Note 3)
Sine Wave Input, to -3dB Loss (Note 3)
(Note 3)
R
(Note 3)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 3)
See Figure 1 (Note 3)
See Figure 1 (Note 3)
See Figure 1 (Note 3)
See Figure 1 (Note 3)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
V
CLK
CLK
CLK
REF
CC
L
= 50Ω, 100mV Sine Wave, to -3dB Loss at I
±5%, V
= 40MSPS, f
= 80MSPS, f
= 100MSPS, f
= 0 to I
REF
EE
HI5731
±5%
CC
TEST CONDITIONS
= -125µA
OUT
OUT
OUT
= +4.75 to +5.25V, V
= 2.02MHz, 20MHz Span
= 2.02MHz, 40MHz Span
= 2.02MHz, 50MHz Span
REF
= Internal
OUT
-1.27
-125
MIN
T
2.0
3.0
0.5
3.0
SET
A
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
= -40
(typically 1.28mA). Ideally the
HI5731BI
-1.23
TYP
0.25
o
175
200
650
2.0
4.5
1.4
3.0
70
70
69
50
10
12
42
70
13
C TO 85
3
5
-
-
-
-
-
-
-1.17
MAX
+50
400
700
0.8
o
50
85
20
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
C
UNITS
µV/
µA/V
MHz
MHz
MHz
mW
dBc
dBc
dBc
mA
mA
mA
µA
µV
kΩ
kΩ
µA
µA
pF
ns
ns
ns
ns
V
V
V
o
C

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