CS4385-DQZ Cirrus Logic Inc, CS4385-DQZ Datasheet - Page 3

• Manufacturer Part Number: CS4385-DQZ
• Description: IC DAC 8CH 114DB 192KHZ 48LQFP
• Manufacturer: Cirrus Logic Inc

Specifications of CS4385-DQZ

• Data Interface: Serial
• Number Of Bits: 24
• Number Of Converters: 8
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 520mW
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Resolution (bits): 24bit
• Sampling Rate: 192kSPS
• Input Channel Type: Serial
• Supply Voltage Range - Analog: 4.75V To 5.25V
• Supply Current: 84mA
• Digital Ic Case Style: QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1154 - BOARD EVAL FOR CS4385 DAC
• Settling Time: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 598-1649

DS671F2
7. FILTER PLOTS ..................................................................................................................................... 48
8. PARAMETER DEFINITIONS ................................................................................................................ 52
9. PACKAGE DIMENSIONS ................................................................................................................... 53
10. ORDERING INFORMATION .............................................................................................................. 54
11. REFERENCES .................................................................................................................................... 54
12. REVISION HISTORY ......................................................................................................................... 54
6.2 Mode Control 1 (address 02h) ........................................................................................................ 37
6.3 PCM Control (address 03h) ............................................................................................................ 38
6.4 DSD Control (address 04h) ............................................................................................................ 39
6.5 Filter Control (address 05h) ............................................................................................................ 41
6.6 Invert Control (address 06h) ........................................................................................................... 41
6.7 Group Control (address 07h) .......................................................................................................... 41
6.8 Ramp and Mute (address 08h) ....................................................................................................... 42
6.9 Mute Control (address 09h) ............................................................................................................ 44
6.10 Mixing Control (address 0Ah, 0Dh, 10h, 13h) .............................................................................. 45
6.11 Volume Control (address 0Bh, 0Ch, 0Eh, 0Fh, 11h, 12h, 14h, 15h) ............................................ 46
6.12 PCM Clock Mode (address 16h) .................................................................................................. 47
6.2.1 Control Port Enable (CPEN) .................................................................................................. 37
6.2.2 Freeze Controls (FREEZE) ................................................................................................... 37
6.2.3 PCM/DSD Selection (DSD/PCM) .......................................................................................... 38
6.2.4 DAC Pair Disable (DACx_DIS) .............................................................................................. 38
6.2.5 Power Down (PDN) ............................................................................................................... 38
6.3.1 Digital Interface Format (DIF) ................................................................................................ 38
6.3.2 Functional Mode (FM) ........................................................................................................... 39
6.4.1 DSD Mode Digital Interface Format (DSD_DIF) .................................................................... 39
6.4.2 Direct DSD Conversion (DIR_DSD) ...................................................................................... 40
6.4.3 Static DSD Detect (STATIC_DSD) ........................................................................................ 40
6.4.4 Invalid DSD Detect (INVALID_DSD) ..................................................................................... 40
6.4.5 DSD Phase Modulation Mode Select (DSD_PM_MODE) ..................................................... 40
6.4.6 DSD Phase Modulation Mode Enable (DSD_PM_EN) ......................................................... 40
6.5.1 Interpolation Filter Select (FILT_SEL) ................................................................................... 41
6.6.1 Invert Signal Polarity (Inv_xx) ................................................................................................ 41
6.7.1 Mutec Pin Control (MUTEC) .................................................................................................. 41
6.7.2 Channel A Volume = Channel B Volume (Px_A=B) .............................................................. 42
6.7.3 Single Volume Control (SNGLVOL) ...................................................................................... 42
6.8.1 Soft Ramp and Zero Cross CONTROL (SZC) ...................................................................... 42
6.8.2 Soft Volume Ramp-Up after Error (RMP_UP) ....................................................................... 43
6.8.3 Soft Ramp-Down before Filter Mode Change (RMP_DN) ..................................................... 43
6.8.4 PCM Auto-Mute (PAMUTE) .................................................................................................. 43
6.8.5 DSD Auto-Mute (DAMUTE) ................................................................................................... 44
6.8.6 MUTE Polarity and DETECT (MUTEP1:0) ............................................................................ 44
6.9.1 Mute (MUTE_xx) ................................................................................................................... 44
6.10.1 De-Emphasis Control (PX_DEM1:0) ................................................................................... 45
6.10.2 ATAPI Channel Mixing and Muting (ATAPI) ........................................................................ 45
6.11.1 Digital Volume Control (xx_VOL7:0) ................................................................................... 46
6.12.1 Master Clock DIVIDE by 2 ENABLE (MCLKDIV) ................................................................ 47
CS4385
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