AD5724RBREZ Analog Devices Inc, AD5724RBREZ Datasheet - Page 26

• Manufacturer Part Number: AD5724RBREZ
• Description: IC DAC 12BIT DSP/SRL 24TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD5724RBREZ

• Data Interface: Serial
• Design Resources: Software Configurable 12-Bit Quad Channel Unipolar/Bipolar Voltage Output Using AD5724R (CN0085)
• Settling Time: 10µs
• Number Of Bits: 12
• Number Of Converters: 4
• Voltage Supply Source: Analog and Digital, Dual ±
• Power Dissipation (max): 310mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP Exposed Pad, 24-eTSSOP, 24-HTSSOP
• Resolution (bits): 12bit
• Sampling Rate: 1.1MSPS
• Input Channel Type: Serial
• Supply Voltage Range - Digital: 2.7V To 5.5V
• Supply Current: 2.5mA
• Digital Ic Case Style: TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD5724R/AD5734R/AD5754R
INPUT REGISTER
The input register is 24 bits wide and consists of a read/write bit (R/ W ), a reserved bit (zero) which must always be set to 0, three register
select bits (REG1, REG2, REG3), three DAC address bits (A2, A1, A0), and 16 data bits (data). The register data is clocked in MSB first on
the SDIN pin.
write registers.
Table 17. AD5754R Input Register Format
MSB
DB23
R/ W
Table 18. Input Register Bit Functions
Data
R/W
REG2, REG1, REG0
A2, A1, A0
DB15 to DB0
Table 17
DB22
Zero
shows the register format, while
Description
Indicates a read from or a write to the addressed register
Used in association with the address bits to determine if a write operation is to the DAC register, output range
select register, power control register, or control register
REG2
0
0
0
0
These bits are used to decode the DAC channels
A2
0
0
0
0
1
Data bits
DB21
REG2
REG1
0
0
1
1
A1
0
0
1
1
0
DB20
REG1
REG0
0
1
0
1
A0
0
1
0
1
0
Table 18
Function
DAC register
Output range select register
Power control register
Control register
Channel Address
DAC A
DAC B
DAC C
DAC D
All four DACs
Rev. C | Page 26 of 32
DB19
REG0
describes the function of each bit in the register. All registers are read/
DB18
A2
DB17
A1
DB16
A0
DB15 to DB0
Data
LSB