TXC-05802AIPQ Transwitch Corporation, TXC-05802AIPQ Datasheet - Page 84

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TXC-05802AIPQ

Manufacturer Part Number
TXC-05802AIPQ
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-05802AIPQ

Operating Supply Voltage (typ)
3.3/5V
Operating Temperature Classification
Industrial
Package Type
PQFP
Mounting
Surface Mount
Pin Count
208
Lead Free Status / Rohs Status
Not Compliant
ORDERING INFORMATION
RELATED PRODUCTS
Figure 56 illustrates typical applications of the CUBIT- Pro CellBus Bus Switch device in a generic architecture
for ATM access switching. The other TranSwitch devices included in this diagram are briefly described below:
TXC-03003B, SOT-3 VLSI Device (STM-1, STS-3, STS-3c Overhead Terminator). This device
performs all the functions for section, line and path overhead processing of STM-1, STS-3 or STS-3c
signals, providing access to all overhead bytes. It performs pointer justification and payload tracking,
alarm detection and generation, and performance monitoring.
TXC-03102, QDS1F VLSI Device (Quad DS1 Framer). A 4-channel DS1 (1.544 Mbit/s) framer for
voice and data applications. This device handles all logical interfacing functionality to a T1 line. This
device is not recommended for use in new designs, which should use QT1F- Plus.
TXC-03103, QT1F- Plus VLSI Device (Quad T1 Framer- Plus ). A 4-channel DS1 (1.544 Mbit/s) framer
designed with extended features for voice and data communications applications.
TXC-05150, CDB VLSI Device (Cell Delineation Block). Extracts/inserts ATM cells from/to DS1, DS3,
E1, STS-1, STS-3c or STM-1 line interface signals. Serial, byte and nibble interfaces operate from
1.544 to 155.52 Mbit/s.
TXC-05501 and TXC-05601, SARA-S and SARA-R VLSI Devices (Segmentation and Reassembly).
A two-chip set for implementation of the ATM Adaptation Layers (AAL) 3, 4, and 5 at line rates from
DS1 (1.544 Mbit/s) up to STS-3c/STM-1 (155.52 Mbit/s).
TXC-05551, SARA-2 ATM Cell Processing IC Device. Used with application-specific microcode to
perform complete segmentation and reassembly (SAR) for implementing ATM adapter cards, legacy
LAN to ATM hubs, and routers. PCI-based host interface. Supports CBR, VBR and UBR services.
Integrated SONET/SDH framer.
TXC-05551/L, SARA- Lite ATM AAL0/5 Segmentation and Reassembly Product (combination of
SARA-2 device and microcode that provides it with the SARA- Lite functionality)
TXC-05801, CUBIT Device (ATM CellBus Bus Switch). Implements cost effective ATM multiplexing
and switching systems, based on the 32-bit CellBus bus architecture. A single-chip solution, the CUBIT
has the ability to send and also receive cells for control purposes over the same CellBus bus. CellBus
bus technology works at aggregate rates of up to 1 gigabit per second and provides header
translation, multiplexing, concentration and switching functions for a wide variety of small-to-medium
size ATM systems. This device is not recommended for use in new designs, which should use
CUBIT- Pro.
TXC-07625, SALI-25C VLSI Device (Six ATM Line Interface at 25 Mbit/s). Six channel 25.6 Mbit/s
ATM transmission convergence function for twisted pair cable. Supports UTOPIA Level 1 and 2.
Provides multicasting capability and 4 level priority queuing.
Part Number: TXC-05802AIPQ
- 84 -
208-pin Plastic Quad Flat Package (PQFP)
Ed. 3, November 1999
TXC-05802
CUBIT- Pro
TXC-05802-MB

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