CY7C4255-25AC Cypress Semiconductor Corp, CY7C4255-25AC Datasheet
CY7C4255-25AC
Specifications of CY7C4255-25AC
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CY7C4255-25AC Summary of contents
Page 1
... Read Clock (RCLK) and a Read Enable pin (REN). In addition, the CY7C4255/65 have an Output Enable pin (OE). The read and write clocks may be tied together for single-clock operation or the two clocks may be run independently for asynchronous read/write appli- cations ...
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... D 0 Functional Description (continued) The CY7C4255/65 provides five status pins. These pins are decoded to determine one of five states: Empty, Almost Empty, Half Full, Almost Full, and Full. The Half Full flag shares the WXO pin. This flag is valid in the stand-alone and width-expansion configurations ...
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... When OE is LOW, the FIFO’s data outputs drive the bus to which they are connected HIGH, the FIFO’s outputs are in High Z (high-impedance) state. Dual-Mode Pin: Asynchronous Almost Empty/Almost Full flags – tied to V Synchronous Almost Empty/Almost Full flags – tied to V (Almost Empty synchronized to RCLK, Almost Full synchronized to WCLK.) CY7C4255 CY7C4265 /SMODE is tied ...
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... IH < V < Com’l 45 Ind 50 Com’l 10 Ind 15 Test Conditions T = 25° MHz 5.0V CC CY7C4255 CY7C4265 [2] Ambient Temperature ± 10% 0°C to +70°C 5V ± 10% –40°C to +85°C 7C42X5-25 7C42X5-35 Max. Min. Max. Min. Max. Unit 2.4 2.4 V 0.4 ...
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... THÉ VENIN EQUIVALENT 410Ω OUTPUT 7C42X5-10 7C42X5-15 Min. Max. Min. 100 4 [12 [12 [13] 12 /SMODE tied [13] 12 /SMODE tied PAF(E) CY7C4255 CY7C4265 ALL INPUT PULSES 90% 90% 10% 10% ≤ 1.91V 7C42X5-25 7C42X5-35 Max. Min. Max. Min. Max. Unit 66.7 40 28.6 MHz ...
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... Skew Time between Read Clock and Write Clock SKEW3 for Programmable Almost Empty and Program- mable Almost Full Flags (Synchronous Mode only) Document #: 38-06004 Rev. *C 7C42X5-10 7C42X5-15 7C42X5-25 Min. Max. Min. Max. Min. Max. 4.5 6 CY7C4255 CY7C4265 7C42X5-35 Min. Max. Unit Page [+] Feedback ...
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... CLK t CLKL NO OPERATION t REF VALID DATA t OE [15] t SKEW2 , then FF may not change state until the next WCLK rising edge. SKEW1 , then EF may not change state until the next RCLK rising edge. SKEW2 CY7C4255 CY7C4265 NO OPERATION t WFF REF t OHZ Page [+] Feedback ...
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... The Latency Timing applies only at the Empty Boundary (EF = LOW). CLK SKEW2 19. The first word is available the cycle after EF goes HIGH, always. Document #: 38-06004 Rev RSR t RSF t RSF t RSF [18] t FRL t REF OLZ When t < minimum specification, t CLK SKEW2 SKEW2 CY7C4255 CY7C4265 [17 [19 (maximum) = either 2 FRL CLK SKEW2 Page [+] Feedback ...
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... ENH t ENS REN LOW DATA IN OUTPUT REGISTER Q – Document #: 38-06004 Rev ENS REF REF SKEW2 t A [14 SKEW1 DATA WRITE t WFF t ENS DATA READ CY7C4255 CY7C4265 ENH [18] t FRL t REF D0 NO WRITE DATA WRITE t WFF t ENH t A NEXT DATA READ Page [+] Feedback ...
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... REN Note: 20. PAE is offset = n. Number of data words into FIFO already = n. Document #: 38-06004 Rev CLKL t t ENS ENH t HF HALF FULL + 1 OR MORE ENS t CLKL t t ENS ENH t PAE WORDS IN FIFO t PAE t ENS CY7C4255 CY7C4265 HALF FULLOR LESS n WORDS IN FIFO Page [+] Feedback ...
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... If a read is preformed on this rising edge of the read clock, there will be Empty + (n−1) words in the FIFO when PAE goes LOW. 24. PAF offset = m. Number of data words written into FIFO already = 8192 − for the CY7C4255 and 16384 − for the CY7C4265. 25. PAF is offset = m. ...
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... ENH Note PAF ENS ENH t ENS t CLKL t ENH t DH PAF OFFSET , then PAF may not change state until the next WCLK rising edge. SKEW3 CY7C4255 CY7C4265 FULL– M WORDS [26] IN FIFO t [30] PAF synch t SKEW3 t t ENS ENH PAE OFFSET – ...
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... CLKH WCLK RXO t ENS REN Write Expansion In Timing WXI WCLK Notes: 31. Write to Last Physical Location. 32. Read from Last Physical Location. Document #: 38-06004 Rev CLKL t ENH t A UNKNOWN PAE OFFSET Note Note Note XIS CY7C4255 CY7C4265 PAF OFFSET PAE OFFSET Page [+] Feedback ...
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... The flags may change state during Retransmit as a result of the offset of the read and write pointers, but flags will be valid at t 35. For the synchronous PAE and PAF flags (SMODE), an appropriate clock cycle is necessary after t Document #: 38-06004 Rev XIS t PRT t RTR . RTR to update these flags. RTR CY7C4255 CY7C4265 Page [+] Feedback ...
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... Flag Operation The CY7C4255/65 devices provide five flag pins to indicate the condition of the FIFO contents. Empty and Full are synchronous. PAE and PAF are synchronous tied 0–17 Full Flag outputs 0–17 The Full Flag (FF) will go LOW when device is Full. Write operations are inhibited whenever FF is LOW regardless of the state of WEN ...
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... Notes: 37 Empty Offset (Default Values: CY7C4255/CY7C4265 n = 127). 38 Full Offset (Default Values: CY7C4255/CY7C4265 n = 127). Document #: 38-06004 Rev. *C internal read pointer to the first physical location of the FIFO. WCLK and RCLK may be free running but must be disabled during and t RTR ...
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... Width Expansion Configuration The CY7C4255/65 can be expanded in width to provide word widths greater than 18 in increments of 18. During width expansion mode all control line inputs are common and all flags are available. Empty (Full) flags should be created by RESET (RS) DATA IN ( WRITE CLOCK (WCLK) ...
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... Depth Expansion Configuration (with Programmable Flags) The CY7C4255/65 can easily be adapted to applications requiring more than 8192/16384 words of buffering. Figure 2 shows Depth Expansion using three CY7C42X5s. Maximum depth is limited only by signal loading. Follow these steps: 1. The first device must be designated by grounding the First Load (FL) control input ...
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... AMBIENT TEMPERATURE (°C) NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE 1.20 1.10 1. 3. MHz 0.80 −55.00 5.00 65.00 125.00 AMBIENT TEMPERATURE (°C) CY7C4255 CY7C4265 vs. AMBIENT A 65.00 125.00 NORMALIZED SUPPLY CURRENT vs. FREQUENCY 1.75 1.50 1.25 1. 5.0V 0. 25° 3.0V IN 0.50 20 ...
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... Ordering Information 8Kx18 Deep Sync FIFO Speed (ns) Ordering Code 10 CY7C4255–10AC CY7C4255–10AXC CY7C4255–10ASC 15 CY7C4255–15AC CY7C4255–15AXC 16Kx18 Deep Sync FIFO Speed (ns) Ordering Code 10 CY7C4265–10AC CY7C4265–10ASC CY7C4265–10ASXC CY7C4265–10AI CY7C4265–10AXI 15 CY7C4265–15AC CY7C4265–15AXC CY7C4265-15ASC Package Diagrams 64-Pin Thin Plastic Quad Flat Pack ( ...
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... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. CY7C4255 CY7C4265 ...
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... Document History Page Document Title: CY7C4255, CY7C4265 8K/16K X 18 Deep Sync FIFOs Document Number: 38-06004 Issue Orig. of REV. ECN NO. Date Change ** 106465 07/11/01 *A 122257 12/26/02 *B 252889 See ECN *C 385985 See ECN Document #: 38-06004 Rev. *C Description of Change SZV Change from Spec Number: 38-00468 to 38-06004 ...