EVAL-AD7274CB Analog Devices Inc, EVAL-AD7274CB Datasheet
EVAL-AD7274CB
Specifications of EVAL-AD7274CB
EVAL-AD7274CB Summary of contents
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FEATURES Throughput rate: 3 MSPS Specified for Power consumption 11 MSPS with 3 V supplies Wide input bandwidth 70 dB SNR at 1 MHz input frequency Flexible power/serial clock ...
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... Typical Connection Diagram ....................................................... 16 Analog Input ............................................................................... 16 Digital Inputs .............................................................................. 16 Modes of Operation ....................................................................... 17 Normal Mode.............................................................................. 17 Partial Power-Down Mode ....................................................... 17 Full Power-Down Mode ............................................................ 17 Power-Up Times......................................................................... 18 Power vs. Throughput Rate....................................................... 20 Serial Interface ................................................................................ 21 Microprocessor Interfacing....................................................... 23 Application Hints ........................................................................... 24 Grounding and Layout .............................................................. 24 Evaluating the AD7273/AD7274 Performance......................... 24 Outline Dimensions ....................................................................... 25 Ordering Guide .......................................................................... 25 Rev Page ...
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SPECIFICATIONS AD7274 SPECIFICATIONS REF Table 2. Parameter DYNAMIC PERFORMANCE 3 Signal-to-Noise + Distortion (SINAD) Signal-to-Noise Ratio (SNR) 3 Total Harmonic Distortion (THD) Peak Harmonic or Spurious ...
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AD7273/AD7274 Parameter CONVERSION RATE Conversion Time 3 Track-and-Hold Acquisition Time Throughput Rate POWER RQUIREMENTS Normal Mode (Static) Normal Mode (Operational) Partial Power-Down Mode (Static) Full Power-Down Mode (Static) 5 Power Dissipation Normal Mode (Operational) Partial Power-Down ...
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AD7273 SPECIFICATIONS REF Table 3. Parameter DYNAMIC PERFORMANCE 3 Signal-to-Noise + Distortion (SINAD) 3 Total Harmonic Distortion (THD) Peak Harmonic or Spurious Noise (SFDR) Intermodulation Distortion ...
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AD7273/AD7274 Parameter POWER RQUIREMENTS Normal Mode (Static) Normal Mode (Operational) Partial Power-Down Mode (Static) Full Power-Down Mode (Static) 5 Power Dissipation Normal Mode (Operational) Partial Power-Down Full Power-Down 1 Temperature range from −40°C to +125°C. 2 ...
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TIMING SPECIFICATIONS REF DD are specified with (10 Table 4. Limit MIN MAX ...
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AD7273/AD7274 TIMING EXAMPLES For the AD7274 brought high during the 14 rising edge after the two leading zeros and 12 bits of the conversion are provided, the part can achieve the fastest throughput rate, 3 MSPS. If ...
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ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 5. Parameters V to AGND/DGND DD Analog Input Voltage to AGND Digital Input Voltage to DGND Digital Output Voltage to DGND Input Current to Any Pin Except Supplies Operating ...
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AD7273/AD7274 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS AD7273/ SDATA 2 AD7274 CS 3 TOP VIEW AGND 4 (Not to Scale) Figure 8. 8-Lead MSOP Pin Configuration Table 6. Pin Function Descriptions Pin No. MSOP TSOT Mnemonic Description 1 ...
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TYPICAL PERFORMANCE CHARACTERISTICS 16384 POINT FFT – 3MSPS SAMPLE F = 1MHz IN SINAD = 71.05 THD = –80.9 –40 SFDR = –82.2 –60 –80 –100 –120 FREQUENCY (kHz) Figure 10. AD7274 Dynamic Performance at 3 MSPS, Input ...
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AD7273/AD7274 –70 –80 –90 –100 100mV p-p SINE WAVE DECOUPLING –110 0 500 1000 1500 SUPPLY RIPPLE FREQUENCY (MHz) Figure 16. Power Supply Rejection Ratio (PSRR) vs. Supply Ripple Frequency Without Decoupling 1.0 0.8 0.6 0.4 ...
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CODES 16000 14000 12000 10000 8000 6000 4000 2000 0 2045 2046 2047 2048 CODE Figure 22. Histogram of Codes for 30,000 Samples 12.0 11.5 11.0 10.5 10.0 2049 2050 1.4 Rev Page ...
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AD7273/AD7274 TERMINOLOGY Integral Nonlinearity (INL) The maximum deviation from a straight line passing through the endpoints of the ADC transfer function. For the AD7273/ AD7274, the endpoints of the transfer function are zero scale at 0.5 LSB below the first ...
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CIRCUIT INFORMATION The AD7273/AD7274 are high speed, low power, 10-/12-bit, single supply ADCs, respectively. The parts can be operated from a 2. 3.6 V supply. When operated from any supply voltage within this range, the AD7273/AD7274 are capable ...
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AD7273/AD7274 TYPICAL CONNECTION DIAGRAM Figure 27 shows a typical connection diagram for the AD7273/ AD7274. An external reference must be applied to the ADC. This reference can be in the range of 1 reference, such as the ...
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MODES OF OPERATION The mode of operation of the AD7273/AD7274 is selected by controlling the logic state of the CS signal during a conversion. There are three possible modes of operation: normal mode, partial power-down mode, and full power-down mode. ...
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AD7273/AD7274 edge the device begins to power up and continues to power up until after the falling edge of the held low. The power-up time required must elapse before a conversion can be initiated, ...
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SCLK SDATA THE PART BEGINS TO POWER SCLK A SDATA INVALID DATA THE PART ENTERS PARTIAL POWER DOWN SCLK THREE-STATE INVALID DATA SDATA THE PART BEGINS TO POWER UP ...
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AD7273/AD7274 POWER VS. THROUGHPUT RATE Figure 34 shows the power consumption of the device in normal mode, in which the part is never powered down. By using the power-down mode of the AD7273/AD7274 when not performing a conversion, the average ...
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SERIAL INTERFACE Figure 36 through Figure 38 show the detailed timing diagrams for serial interfacing to the AD7274 and AD7273, respectively. The serial clock provides the conversion clock and controls the transfer of information from the AD7273/AD7274 during conversion. The ...
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AD7273/AD7274 SCLK t 3 SDATA Z ZERO DB11 THREE- STATE TWO LEADING ZEROS SCLK SDATA Z ZERO DB9 THREE- STATE TWO LEADING ZEROS t CONVERT t ...
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MICROPROCESSOR INTERFACING AD7273/AD7274 to ADSP-BF53x The ADSP-BF53x family of DSPs interfaces directly to the AD7273/AD7274 without requiring glue logic. The SPORT0 Receive Configuration 1 register should be set up as outlined in Table 8. AD7273/ AD7274 1 SPORT0 SCLK RCLK0 ...
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... PC via the evaluation board controller. The evaluation board controller can be used in conjunction with the AD7273/AD7274 evaluation board, as well as many other Analog Devices evaluation boards ending in the CB designator, to demonstrate/evaluate the ac and dc performance of the AD7273/AD7274. ...
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... AD7273BRMZ-REEL −40°C to +125°C AD7273BUJ-REEL7 −40°C to +125°C 2 AD7273BUJZ-500RL7 −40°C to +125°C 3 EVAL-AD7274CB 3 EVAL-AD7273CB 4 EVAL-CONTROL BRD2 1 Linearity error refers to integral nonlinearity Pb-free part. 3 This can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL board for evaluation/demonstration purposes. ...
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AD7273/AD7274 NOTES Rev Page ...
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NOTES Rev Page AD7273/AD7274 ...
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AD7273/AD7274 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04973–0–9/05(0) T Rev Page ...