PEF80912HV14NP Lantiq, PEF80912HV14NP Datasheet - Page 17

PEF80912HV14NP

Manufacturer Part Number
PEF80912HV14NP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF80912HV14NP

Lead Free Status / Rohs Status
Supplier Unconfirmed
Table 2
Pin
28
29
32
33
40
39
44
41
3
4
34
11
38
26
Data Sheet
Pin Definitions and Functions (cont’d)
Symbol
SX1
SX2
SR1
SR2
XIN
XOUT
AOUT
BOUT
AIN
BIN
VDDDET
MTI
PS1
PS2
Type
O
O
I
I
I
O
O
O
I
I
I
I
I
I
Function
S-Bus Transmitter Output (positive)
S-Bus Transmitter Output (negative)
S-Bus Receiver Input
S-Bus Receiver Input
Crystal 1:
Connected to a 15.36 MHz crystal
Crystal 2:
Connected to a 15.36 MHz crystal
Differential U-interface Output
Differential U-interface Output
Differential U-interface Input
Differential U-interface Input
VDD Detection:
This pin selects if the V
(’0’) and reset pulses are generated on pin
RSTO or whether it is deactivated (’1’) and an
external reset has to be applied on pin RST.
Metallic Termination Input.
Input to evaluate Metallic Termination pulses.
Tie to ’1’ if not used.
Power Status (primary).
The pin status is passed to the overhead bit
’PS1’ in the U frame to indicate the status of the
primary power supply (’1’ = ok).
Power Status (secondary).
The pin status is passed to the overhead bit
’PS2’ in the U frame to indicate the status of the
secondary power supply (’1’ = ok).
9
DD
detection is active
PEF 80912/80913
2001-03-29
Overview

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