EWIXP455BAB 881446 Intel, EWIXP455BAB 881446 Datasheet - Page 80
EWIXP455BAB 881446
Manufacturer Part Number
EWIXP455BAB 881446
Description
Manufacturer
Intel
Datasheet
1.EWIXP455BAB_881446.pdf
(163 pages)
Specifications of EWIXP455BAB 881446
Core Operating Frequency
266MHz
Operating Supply Voltage (typ)
1.3/1.5/2.5/3.3V
Operating Supply Voltage (max)
1.575/2.7/3.465V
Operating Supply Voltage (min)
1.235/2.3/3.135V
Package Type
BGA
Pin Count
544
Mounting
Surface Mount
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
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Package Information
Table 18.
May 2005
80
CTS0_N
RTS0_N
RXDATA1
TXDATA1
CTS1_N
RTS1_N
NOTE: This table discusses all features supported on the Intel
† For a legend of the Type codes, see
Name
processor, see
UART Interfaces (Sheet 2 of 2)
Power
Reset
on
Table 1 on page
H
H
Z
Z
Z
Z
†
Reset
VI/H
VI/H
VO
V0
V0
VI
†
Table 10 on page
14.
Software
Enables
Normal
Reset
After
Until
VI/H
VI/H
VO
VO
VO
VI
Software
Enables
Normal
After
VI/H
VI/H
46.
VO
VO
VO
VI
®
IXP45X and Intel
Type
O
O
O
I
I
I
†
UART CLEAR-TO-SEND input to UART Pins.
When logic 0, this pin indicates that the modem or data set connected to the UART interface of the
processor is ready to exchange data. The signal is a modem status input whose condition can be
tested by the processor.
Should be pulled high through a 10-KΩ resistor when not being utilized in the system.
UART REQUEST-TO-SEND output:
When logic 0, this informs the modem or the data set connected to the UART interface of the
processor that the UART is ready to exchange data. A reset sets the request to send signal to
logic 1.
LOOP-mode operation holds this signal in its inactive state (logic 1)
UART serial data input.
Should be pulled high through a 10-KΩ resistor when not being utilized in the system.
UART serial data output. The TXD signal is set to the MARKING (logic 1) state upon a Reset
operation.
UART CLEAR-TO-SEND input to UART pins.
When logic 0, this pin indicates that the modem or data set connected to the UART interface of the
processor is ready to exchange data. The signal is a modem status input whose condition can be
tested by the processor.
Should be pulled high through a 10-KΩ resistor when not being utilized in the system.
UART REQUEST-TO-SEND output:
When logic 0, this informs the modem or the data set connected to the UART interface of the
processor that the UART is ready to exchange data. A reset sets the request to send signal to
logic 1.
LOOP-mode operation holds this signal in its inactive state (logic 1).
®
IXP46X Product Line of Network Processors. For details on feature support listed by
Intel
®
IXP45X and Intel
Description
®
IXP46X Product Line of Network Processors Datasheet
Document Number:
306261-002
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