SLATAFL6GBJI STEC, SLATAFL6GBJI Datasheet
SLATAFL6GBJI
Specifications of SLATAFL6GBJI
Related parts for SLATAFL6GBJI
SLATAFL6GBJI Summary of contents
Page 1
ATA Flash PC Cards FEATURES • ATA-4 Compatibility • Support for PCMCIA I/O, Memory and True-IDE Interfaces • Form Factors: PC Card Type II • Endurance Guarantee of 2,000,000 Write/Erase Cycles • CIS (Card Information ...
Page 2
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) PACKAGE DIMENSIONS AND PIN LOCATIONS PC Card Type II Length ...................................... 3.370±0.008 in (85.60±0.20 mm) Width ........................................ 2.126±0.004 in (54.00±0.10 mm) Thickness ..................................... ...
Page 3
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) PIN ASSIGNMENTS PC Card Memory Mode Pin Signal Num Name 1 GND 2 D03 3 D04 4 D05 5 D06 6 D07 7 ...
Page 4
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) PIN ASSIGNMENTS (continued) PC Card Memory Mode Pin Signal Num Name 51 VCC ...
Page 5
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) SIGNAL DESCRIPTIONS Signal Name Dir BVD2 (PC Card Memory Mode) -SPKR (PC Card I/O Mode) -DASP (True IDE Mode) -CD1, ...
Page 6
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) SIGNAL DESCRIPTIONS Signal Name Dir -OE I (PC Card Memory Mode) -OE (PC Card I/O Mode) -OE (True IDE Mode) RDY/-BSY O (PC ...
Page 7
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) SIGNAL DESCRIPTIONS Signal Name Dir -CSEL I (PC Card Memory Mode) -CSEL (PC Card I/O Mode) -CSEL (True IDE Mode) -REG I (PC ...
Page 8
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) SIGNAL DESCRIPTIONS Signal Name Dir -WAIT O (PC Card Memory Mode) -WAIT (PC Card I/O Mode) IORDY (True IDE Mode) GND — 1, ...
Page 9
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin w.r.t. Vss Storage Temperature range RECOMMENDED OPERATING CONDITIONS Parameter Commercial operating temperature Industrial operating temperature ...
Page 10
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) ENVIRONMENTAL CHARACTERISTICS Leaded Cards (without the “U” option) Shock half-sine, 0.330 ms to 0.750 ms (per MIL-STD-202G Method 213B, Condition A) ...
Page 11
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) AC CHARACTERISTICS (Ta = 0°C to 70°C for commercial temperature parts –40°C to 85°C for industrial temperature parts; VCC = ...
Page 12
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) AC CHARACTERISTICS Attribute Memory Write AC Characteristics Speed Version: Item Write Cycle Time Write Pulse Width Address Setup Time Data Setup Time for ...
Page 13
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) AC CHARACTERISTICS I/O Access Read AC Characteristics Cycle Time Mode: Item Data Delay after -IORD Data Hold following -IORD -IORD Width Time Address ...
Page 14
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) AC CHARACTERISTICS I/O Access Write AC Characteristics Cycle Time Mode: Item Data Setup before -IOWR Data Hold following -IOWR -IOWR Width Time Address ...
Page 15
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) AC CHARACTERISTICS Register Access AC Characteristics for True IDE Parameter Cycle time (min) Address valid to -IORD/-IOWR (min) setup -IORD/-IOWR pulse width 8bit ...
Page 16
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) AC CHARACTERISTICS True IDE Mode Access Read/Write Timings ADDR valid -IORD/-IOWR D15 to D0 (Write) D15 to D0 (Read) -IOIS16 IORDY (continued) t0 ...
Page 17
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) HOST ACCESS SPECIFICATION Attribute Access Specifications The CIS can be accessed by Byte/Word/Odd-byte modes which are defined by PC Card card standard specifications. ...
Page 18
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) Task File Register Access Specifications There are two cases of Task File register mapping, one is the mapped I/O address area, the other ...
Page 19
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) Memory Address Map Task File Register Read Access Mode Mode -REG -CE2 Standby Mode x H Byte Access (8 bit ...
Page 20
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) True IDE Mode The card is configured in a True IDE mode of operation when the -OE input signal is asserted GND by ...
Page 21
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) CIS INFORMATION (TYPICAL) -------- 0000: Code 01, link -------- Tuple CISTPL_DEVICE (01), length 3 (03) at offset 0 Device ...
Page 22
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) -------- 0037: Code 1A, link -------- Tuple CISTPL_CONFIG (1A), length 5 (05) at offset 37 Last valid ...
Page 23
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) -------- 0064: Code 1B, link -------- Tuple ...
Page 24
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) CONFIGURATION REGISTER SPECIFICATION This card supports four configuration registers for the purpose of the configuration and observation of the card. These registers can ...
Page 25
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) Configuration and Status Register (Address 202h) This register is used for observing the card state. bit7 bit6 bit5 CHGED SIGCHG IOIS8 Initial Value: ...
Page 26
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) Pin Replacement Register (Address 204h) This register is used for providing the signal state of -IREQ when the card is configured as the ...
Page 27
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) TASK FILE REGISTER SPECIFICATION These registers are used for reading and writing data to the card. These registers are mapped four types by ...
Page 28
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) Contiguous I/O Map (INDEX=1) -REG A10- ...
Page 29
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) Secondary I/O Map (INDEX=3) -REG A10 A9- 17h 0 X 17h 0 X 17h 0 X 17h 0 X 17h 0 ...
Page 30
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) Data Register The Data Register bit read/write register used for transferring data between the card and the host. This register ...
Page 31
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) Sector Count Register This register contains the numbers of sectors of data requested to be transferred on a read or write operation between ...
Page 32
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) Drive/Head Register This register select the device address translation (CHS or LBA) and provides head address (CHS) or high order address bits 27:24 ...
Page 33
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) Status Register This read only register indicates status of a command execution. When the BSY bit is “0”, the other bits are valid; ...
Page 34
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) Device Control Register This write only register is used for controlling the interrupt request and issuing an ATA soft reset to the card. ...
Page 35
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) ATA COMMAND SPECIFICATIONS This table with the following paragraphs summarizes the ATA command set. No. Command set 1 Check Power Mode 2 Execute ...
Page 36
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) Check Power Mode (code: E5h or 98h) This command checks the power mode. Execute Drive Diagnostic (code: 90h) This command performs the internal ...
Page 37
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) Word Data Total Address Bytes 0 848AH 2 General configuration bit-significant information (value=044AH for versions with the -F suffix) 1 XXXXH 2 Default ...
Page 38
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) Request Sense (code: 03h) This command requests an extended error code after a command ends with an error. Refer to table below. Code ...
Page 39
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) Write Multiple (code: C5h) This command is similar to the Write Sectors command. Interrupts are not presented on each sector, but on the ...
Page 40
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) SECTOR TRANSFER PROTOCOL Sector Read One sector read procedure after the card is configured to I/O interface is shown in the following charts. ...
Page 41
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) Sector Write One sector write procedure after the card is configured to I/O interface is shown in the following charts. Set the cylinder ...
Page 42
SLATAFLxxxJ(U)(I)-(F)(S) SimpleTech P/N: (where xxx=capacity; U=RoHS compliant lead-free; I=Ind. Op. Temp; F=fixed device; S=small data packet optimized) REVISION HISTORY Rev. Change Description from Previous Revision -101 2/1/04. Initial Release. -102 5/26/04. Sleep mode current at 3.3V corrected to 80µA from ...