LQ10D36A Sharp Electronics, LQ10D36A Datasheet - Page 9

• Manufacturer Part Number: LQ10D36A
• Manufacturer: Sharp Electronics

Specifications of LQ10D36A

• Lead Free Status / Rohs Status: Compliant

7. Timing Characteristics of input signals
7-2. Horizontal display position
7-3. Vertical display position
Timing diagrams of input signal are shown in Fig.2 - ①∼③ .
7-1. Timing characteristics
Note) In case of lower frequency, the deterioration of display quality, flicker etc., may be occurred.
The horizontal display position is determined by the rising edge of ENAB signal.
Note) When ENAB is fixed "Low", the display starts from the data of C104(clock) as shown in Fig.2-①∼③.
Enable signal Setup time
Hsync-Enable signal
phase difference
Clock
Data
Horizontal
sync. signal
Vertical
sync. signal
Horizontal display period
Hsync-Clock
Phase difference
Hsync-Vsync
Phase difference
When the phase difference is below 104 clocks, keep the “High” level of ENAB is signal longer
than 104-The clocks. If it will not be kept, the display starts from the data of C104(clock).
The vertical display position is automatically centered in the active area at each mode of VGA
480, 400, and 350-line mode, when each mode is selected depending on the polarity of
the synchronous signals described in 4-1(Note1).
Parameter
Parameter
Pulsewidth
Pulse width
Frequency
High time
Low time
Setup time
Hold time
Cycle
Pulse width
Cycle
symbol
Symbol Mode
1/Tc
THp
TVp
THe
THd
THc
TVh
Tdh
Tes
Tep
Tch
Tds
Tcl
TH
TV
Min.
480
400
350
all
〃
〃
〃
〃
〃
〃
〃
all
〃
〃
〃
44
5
2
Data Modul AG - www.data-modul.com
30.00
Min.
750
515
446
447
640
10
10
10
Typ.
−
5
5
2
1
0
640
−
−
25.18
31.78
TH-664 clock
Typ.
800
449
640
525
449
Tc-10
Max.
−
−
−
−
96
−
−
−
640
TH-THp clock
Tc-10
28.33
Max.
clock
900
200
510
640
560
480
Unit
−
−
−
−
−
34
ns
Remark
clock
clock
clock
MHz
Unit
line
line
line
line
μs
ns
ns
ns
ns
ns
Remark
9